AMDK11

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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Chips and Cheese:

    Oct 25, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    In the case of Skymont, it is more difficult for me to recognize the structures. I found the description, but it looks like someone...

    Oct 22, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Delete

    Oct 22, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    I didn't forget. L2 3MB is the lion's share of LionCove core. You can clearly see that in ArrowLake it is 512KB(0.5MB) bigger than the...

    Oct 22, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Including larger Front-End, 8x wider predictor, 8-Wide decode, L1-I 64KB, UOP Cache(L0) 5250, Queue 192, ROB 576, Branch Order Buffer...

    Oct 22, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Lower clock speeds, densely packed Skymont core logic, smaller structures including buffers. There is no great philosophy here. See on...

    Oct 18, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Apple in Mx and ARM adds a total of 8 ALUs, gaining a significant IPC increase for INT, but in your opinion Skymont adds 2x more for no...

    Oct 18, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    LionCove has ALU with more MUL, SHIFT and Branch. There are more of these units in ALU LionCove. The fact is that Skymont with 8xALU...

    Oct 18, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Look at it from a different perspective. Skymont gains this IPC increase for Integer at 8x ALU compared to 6x ALU in LionCove and 4x...

    Oct 18, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    This is just a hypothesis, as Netbrust has never had a larger number of execution units or a wider decoder in any generation. How...

    Oct 18, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    The fact that Gracemont (2021) achieved IPC Skylake (2015) and Skymont (2024) achieved IPC GoldenCove/RaptorCove (2021-2022) is not...

    Oct 18, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    Pentium 4 never had more than a 1-Way decoder and even in its last incarnation it was not intended to have a higher IPC but to achieve...

    Oct 16, 2024
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    AMDK11 reacted to Hulk's post in the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads with Like.

    Wow, lots of hating on Intel suddenly. Pat was the lead architect for the 486, he knows a lot about microprocessor design, no doubt...

    Oct 14, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    What changes took place inside Intel and the merger of the P and E teams is one thing, but interpreting it without knowing the details...

    Oct 13, 2024
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    AMDK11 replied to the thread Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads.

    No, LionCove is the first Intel core since 1995 to introduce separate schedulers and pipelines for FP and separate ones for ALU. The...

    Oct 13, 2024

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