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DavidC1
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DavidC1
replied to the thread
Question
Intel's future after Pat Gelsinger
.
That's just one of them though. Where's the "multiple non-critical" cuts going to come from?
Today at 2:46 PM
D
DavidC1
replied to the thread
Question
Intel Mont thread
.
Gracemont is way better than Tremont, because of the much better architecture. AVX supports new instructions that SSE doesn't and in...
Today at 2:45 PM
D
DavidC1
replied to the thread
News
Intel GPUs - Falcon Shores cancelled
.
Now a new CEO is here, I will reiterate that Intel should NOT abandon their client dGPU efforts. All the progress they are making with...
Yesterday at 6:35 AM
D
DavidC1
replied to the thread
Question
Intel's future after Pat Gelsinger
.
There's not much to cut anymore. -Embedded -dGPU -OpenSource efforts: Like OneAPI -FPGA -WiFi -Ethernet and IPU Other than maybe FPGA...
Yesterday at 6:26 AM
D
DavidC1
replied to the thread
Question
Intel Mont thread
.
Yes, but most of the gains come from having the necessary instructions. Like an article from HPCWire promoting AVX512 said it allows...
Monday at 7:33 PM
D
DavidC1
replied to the thread
Question
Intel Mont thread
.
That IS the bottleneck, because performance increase doesn't come free. The investment in area and transistors for that is probably 5%...
Monday at 7:17 PM
D
DavidC1
replied to the thread
Discussion
RDNA4 + CDNA3 Architectures Thread
.
Something that puts out performance, a GPU, CPU, or even a car for that matter can't have 100% scaling from scaling up a portion of the...
Monday at 7:11 PM
D
DavidC1
replied to the thread
Question
Intel Mont thread
.
You said: "Now Arctic Wolf is getting AVX-512 now what would be the difference between P and E core cause for once I think E will match...
Friday at 7:00 AM
D
DavidC1
replied to the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
.
They need *significant* reductions to get a noticeable improvement, which won't happen without better engineering. I can believe being...
Friday at 6:48 AM
D
DavidC1
replied to the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
.
Unless huge changes to a positive way is happening now, it won't be "fixed" for another 5 years on top of that. I wouldn't be surprised...
Mar 27, 2025
D
DavidC1
replied to the thread
Question
Intel Mont thread
.
Yes, because aiming for high scalar Integer performance benefits everything: Integer, FP, AI, cryptography. It won't be 30% Integer and...
Mar 27, 2025
D
DavidC1
replied to the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
.
SOCAMM seems to be higher cost than LPCAMM, and that comes with better specs, but it's really slotting between HBM and regular DDR...
Mar 27, 2025
D
DavidC1
replied to the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
.
It's brain drain that impacted them from doing anything right. They didn't/don't have the right people/team to do their jobs. Also...
Mar 27, 2025
D
DavidC1
reacted to
511's post
in the thread
Discussion
Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads
with
Like
.
This is before pat Sapphire Rapids/Ponte Vehicco are Chiplets. This time the Chiplet is not the issue as I have said before it is...
Mar 27, 2025
D
DavidC1
replied to the thread
Question
Intel Mont thread
.
The portion of the vector instructions for overall performance is a fraction, thus the capability of the uarch is more important. And...
Mar 27, 2025
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