Idontcare you're not exactly one of those laypeople, are you? Do you know what cluster based multithreading is? Bulldozer presumably is going to make us of that and it's supposed to be 'better' than SMT according to those slides.
Is this the correct description:
"These patent application...
No, reason to roll eyes. Photonics and the use of light is a serious avanue of research, at least when it comes to interconnects.
http://en.wikipedia.org/wiki/S...cs#Physical_properties
http://techresearch.intel.com/...es/Tera-Scale/1419.htm
So you're saying there's no way they can implement it in a modified K10.5 version e.g. Magny Cours or some other version slated for launch in 2010? That might hurt a lot..
Yes, Wikipedia is unrivaled, outstanding and a pretty reliable encyclopedia. Yes, they even happen to use actual sources which everyone can reliably check. In this case the article is based on some rumours from the far east -- what did you expect? Rumours are rumours. At this stage there is...
Not if we can trust that CPU-Z read-out (I'm quite sure we can trust JC. he was the first one to leak & publish nehalem numbers). Doesn't changing L2 involve a major redesign?
http://www.dvhardware.net/article34782.html
According to Wikipedia, however, Sandy Bridge is going to have 512KB L2.
If we know how well westmere fares we might be able to better extrapolate what AMD will be up against, as - correct me if I'm wrong - sandy bridge will be a heavily tweaked westmere chip.
I'm expecting them to deliver the 5-10% IPC increase that we came to expect from Intel die shrinks, but...
When's AMD supposed to launch 32nm? There's a lot of talk of AMD 'closing the gap' or Intel losing their process tech advantage, but is there any official or reliable data to substantiate such rumours?
Does anyone know what we can expect from westmere IPC and feature wise? (there is that one...
In the strictest sense I believe most known encryption standards are broken from the beginning. They're merely working because decryption takes too much time. AFAIK correctly implemented encryption via one time pads is the only de facto unbreakable encryption algorithm. Just wondering if this is...
I got what you mean; but if software is optimisied I'd assume it will scale to n threads (as well as possible). If it uses n threads the gap will surely widen because of HT. Other than that (at 4 threads) both systems should benefit more or less the same, I agree.
I'm not sure if it is that clear cut and I would bet my money i7 anyway. You have seen the server benchmarks? Both are "sever CPUs" and "similar" as you say, but nehalem completely annihilates shanghai clock for clock in most server tasks, which are generally well-threaded.
I remember from...
Great review. Nemesis did you forget to take your meds today? And does anyone know what happened to xtremesystems.org? (haven't they been down for days; someone over there also wanted to review a gainestown rig so I wanted to check it out - see I'm not off topic)
Wow. That's pretty insulting. IDC's comments are the only reason I regularly visit this board and I've never seen him make an unreasonable statement.
MarcVenice, one could ask "what makes you sure they are functional"? I believe there are parts of the core which are not stressed by prime...
Are you sure QPI will be necessarily replaced with a completely new optical interconnect and it can't just replace our current QPI implementation without major changes?
Dkanter said: "Clock encoding and clock and data recovery are prerequisites for optical interconnects, which will eventually...
Cherry picked i7 975 did 5ghz on air IIRC (over at xtremesystems).
Some golden i7 do 4,5-4,6 ghz on air/water, how many PhII and penryn QC can do it these days? I am not sure.
No, actually I didn't mean what I said in this case. I was thinking about L1 latency (3->4 cycles). It is generally...
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