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M
MS_AT
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Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
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M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
And no one yet pointed a single workload where this latency was confirmed to have noticeable influence on performance. We were shown few...
48 minutes ago
M
MS_AT
reacted to
Tuna-Fish's post
in the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
with
Like
.
Yes. This helps less against spilling due to register pressure, where latency is usually out of the critical path, as the spilled value...
Yesterday at 10:58 AM
M
MS_AT
reacted to
Hitman928's post
in the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
with
Like
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Rumors being wrong does not equal a delay.
Yesterday at 10:04 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
It's a pity AMD itself is unable to communicate this information or provide details about what is going on. I mean if they want to keep...
Yesterday at 8:59 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
I am surprised they don't compile their own stuff to order, linking everything statically, then there is really nothing from system that...
Yesterday at 8:34 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
That's actually the interesting part of this whole ordeal and not if CS will suddenly do 500FPS from 450 FPS ;) But we will get another...
Yesterday at 3:19 AM
M
MS_AT
reacted to
yuri69's post
in the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
with
Haha
.
We 'member: https://www.anandtech.com/show/5448/the-bulldozer-scheduling-patch-tested
Yesterday at 3:09 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
Sure, just wanted to point it out until we get another hype train;)
Wednesday at 7:37 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
On the screenshot you can see that it is 2 socket configuration with each socket having 128 cores with SMT disabled. So this frequency...
Tuesday at 5:16 PM
M
MS_AT
replied to the thread
Discussion
Zen 5 Architecture & Technical discussion
.
I will let myself quote the original article: In other words try as hard as you can software engineers will manage to nullify...
Tuesday at 12:28 PM
M
MS_AT
reacted to
CouncilorIrissa's post
in the thread
Discussion
Zen 5 Architecture & Technical discussion
with
Like
.
https://chipsandcheese.com/2024/08/20/zen-5-variants-and-more-clock-for-clock/
Tuesday at 12:19 PM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
You can load from L1 128B/c with AVX512, 64B/c with AVX2 and 32B/c with pure scalar code. For Zen4 it was respectively, 64B/c, 64B/c...
Tuesday at 8:09 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
Ah true, I was wondering if there is a special instruction for that, but you don't need special instructions for everything;) Ah yes, I...
Tuesday at 5:16 AM
M
MS_AT
replied to the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
.
You confuse register renaming with architectural state that compiler has to preserve. Compiler doesn't know you have 220 register file...
Tuesday at 3:26 AM
M
MS_AT
reacted to
Mahboi's post
in the thread
Discussion
Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
with
Like
.
Aw come on I have 0 formal education in electronics and just learned from Discord servers and listening in here. ^^ Even if I had zero...
Monday at 5:35 PM
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