It is not just Apple but all ARM64 SoCs - because the raytracing kernel is implemented using the Intel Embree library, which uses SSE/AVX SIMD implementation to speed-up computation. Issue is, that the ARM64 implementation is just a simple SSE-2-NEON wrapper. So technically the implementation is...
If this is a phone chip it will have around 4W TDP - 12W are far from being sustainable in a phone chassis. I am talking about sustained performance and not short term peak.
Look at a random Laptop with Intel CPU, there is a big gap between PL1 and PL2. PL1 is the relevant metric here, as that...
Currently the medium cores are only loaded if I need full multicore performance. For background tasks I barely see them taking more than 20% load.
So background tasks can not possibly the argument for adding more medium cores - and yes I am talking Windows here.
However in a thermally...
Static power of SRAM is highly dependent on the minimum cycle time. So lower clocked LLC has much less leakage per MByte than say L1$ - we are talking factors here.
In general you save power when avoiding expensive DRAM access.
I am not sure, if the Snapdragon 850 is fully compatible with Hyper-V (e.g. for Linux/WSL). On the other hand, with 4GByte memory, trying WSL or WSA (Android) is most likely pointless.
It is crazy, that you are getting LTE with these models.
Excuse my ignorance, but the Qualcomm 8CX Gen 3 is extremely competitive against any 9W and below SoC from Intel or AMD - including those Jasper Lake and Lakemont based SoCs discussed right here.
Few comments. The cubic scaling only holds locally, because the F/V curve is not linear - it is rather a hyperbolic function, which has a zero/pole roughly at Vth. This means at half the frequency you might need more or less than half the voltage - depending on what your reference point is...
Depends on how you see it. Despite the article being 4 years old, most of the things stated there still hold true. That shows you how slow things are moving and that a decade is already underestimated.
In fact as was pointed out, the window of opportunity might be closing for RISC-V, as there is...
A backup plan based on a ground up design does not really help. It could be a ground-up design today already. As you correctly are pointing out, the only thing that matters is, what the judge believe it is. The proof needs to be presented by ARM and some evidence is most likely not sufficient...
You are dreaming of some non-existing cores. The topic is about P670, which does not even match the integer performance of Cortex A-78. Perhaps some very low-end devices, which suffer even more under dynarec.
Box64 is only available as dynarec for x64/x86->ARM64. Everything else is...
You probably missed the memo, that Qualcomms compute platforms only contain X- and 7-series cores since 2021. It probably beat the Qualcomm compute platforms from 2018 - but who cares. And this is before we are talking about ARM64 and x64 emulation, which would be required for both Android and...
Currently the lawsuit has no direct impact to engineering and only limited impact to marketing. Whatever they develop under the Qualcomm ALA, they are allowed to do so. The dispute is about the old Nuvia IP.
The positions are not really apart. The only open question is, if Qualcomm has destroyed the Nuvia IP or not. Qualcomm claims yes, but ARM says they have evidence that it is not destroyed. Of course ARM can not really prove this without insider knowledge.
And most likely there are some...
Make no mistake, the Cortex-X3 is already very close to the Apple core IPC wise. A quick calculation based on the Cortex X1 give the following picture:
Geekbench 5.4 ST for X1 @ 3GHz: 1250
X1 -> X3 (25%) = 1562
X3@3GHz -> X3@3.6GHz = 1875
Thats close to M2.
The reason ARMs claims are weak is, that Qualcomm is in the situation to re-create the Nuvia IP after they destroyed it - they did hire the people who designed the Nuvia cores. The whole lawsuit centers around the claim, that Qualcomm (according to ARM) did not have enough time to re-create the...
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