It's pretty clear that both Intel and AMD are going to rely on op Caches to bypass x86 decoder limitations. (Intel even calls the x86 decoders as the "Legacy Decode Pipeline").
I'll note that SSE5 was never adopted rather it was separated into XOP, FMA4, and F16C with the first 2 deprecated by AMD while the last one was adopted by both Intel and AMD.
To me the obvious path forward is with large op-caches after all the caches in the Zen architectures can already issue 8 decode instruction per clock. Wouldn't be surprised if Zen 4 went to 16K op cache and maybe even cut back on the x86 decoders.
Seems to be the consensus that the M1 hardware encoders produce mediocre output compared to software which is pretty much consistent with most non-professional hardware encoders. The casual user who going to encode their videos is going to get much value going from their camera/phone's hardware...
Backlogs aren't uncommon in capital intensive industries. For example when the 787 backlog fell to 546 planes or about a 3 year backlog Boeing responded by slashing production. ASML backlog in contrast looks to be just 2 years.
Here's a laptop with 3950x which is a full size desktop processor.
https://www.eurogamer.net/articles/digitalfoundry-2020-xmg-apex-15-review-ryzen-9-3950x-in-a-laptop
We have our first M1 Cinebench R23 courtesy of Bits and Chips.
990
CPU encoders usually produce better quality output than hardware encoders. I occasionally do a bit of encoding an I use x264.
The Zen 3 review noted that the prefetchers managed to foil the TLB+CLR thrash test which is designed to bypass prefetchers so better prefetchers are pretty debatable. Also something to note while Apple's cache has great latency they lag quite a bit in bandwidth. In fact clock for clock Zen 2 L2...
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