zir_blazer

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    zir_blazer replied to the thread Question What non dual CPU solution gets me the most PCIe lanes? AMD or Intel?.

    You sound like someone that should be on a ThreadRipper or EPYC platform. Who doesn't like 128 lanes?

    Jan 25, 2025
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    zir_blazer replied to the thread Discussion Anyone else bored out of their mind due to mainstream CPU market stagnation?.

    Stagnation between 2002 and 2006? What the hell are you talking about? AMD side we got AMD K8 and Dual Cores in that time period and I...

    Jan 20, 2025
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    zir_blazer replied to the thread Discussion Anyone else bored out of their mind due to mainstream CPU market stagnation?.

    Didn't Intel recently said that they were actually going to release it? And it is not only Raptor Lake Refresh Refresh. It is Alder Lake...

    Jan 11, 2025
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    zir_blazer replied to the thread Question Which CPU I should choose for coding and multitasking?.

    You sure that is how it works?

    Jan 8, 2025
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    zir_blazer replied to the thread Info Some interesting tidbits about AMD's cancelled K9 CPU.

    They tried some kind of comeback before the pandemy because you can see that there are three new articles for 2019-2020.

    Jan 6, 2025
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    zir_blazer replied to the thread Question The "lens" of two NVMe(s) in RAID 0.

    I don't know how many times I have to state this. YOUR UNDERSTANDING OF HOW PCI EXPRESS IMPACTS PERFORMANCE IS COMPLETELY WRONG. A PCIe...

    Jan 3, 2025
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    zir_blazer replied to the thread Info Some interesting tidbits about AMD's cancelled K9 CPU.

    Real World Technologies forum interface with the tree with branching posts looks more archaic than the traditional forums that I know...

    Jan 1, 2025
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    zir_blazer replied to the thread Question The "lens" of two NVMe(s) in RAID 0.

    You got it wrong. Is not about total Processor lanes, is about the lanes that are connected between devices. You're failing to view PCIe...

    Dec 31, 2024
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    zir_blazer replied to the thread Question The "lens" of two NVMe(s) in RAID 0.

    I still believe that your understanding is completely wrong because you began asking if available PCIe Lanes makes one Processor slower...

    Dec 29, 2024
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    zir_blazer replied to the thread Question The "lens" of two NVMe(s) in RAID 0.

    I believe that whatever your understanding about how "available pcie lanes" are supposed to work is completely wrong. Try reading this...

    Dec 28, 2024
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    zir_blazer replied to the thread Question Your own 130nm custom silicon if you dare.

    Google SkyWater OpenPDK is rather old at this point: https://hackaday.com/tag/skywater/ I'm sure that I saw a photo of wafers related...

    Dec 6, 2024
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    zir_blazer replied to the thread Question Go With Alder Lake for Cool & Quiet ECC RAM Supporting Processor?.

    This is actually very bad advice. Intel made ECC a mostly mainstream feature on Alder Lake/Raptor Lake but on models xx500 or higher...

    Dec 4, 2024
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    zir_blazer replied to the thread Question XOR and other bitwise operations in new CPUS.

    I believe that your idea is... very badly thought. What on earth are you trying to achieve? To remove noise in results, you most likely...

    Nov 30, 2024
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    zir_blazer replied to the thread Question Affordable HEDT platform?.

    "affordable" and "HEDT" are not compatible. From a price perspective, is more likely that you can get an usable server from a few...

    Nov 30, 2024

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