Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

poke01 · Jun 3, 2024

adroc_thurston said:
Some variants, yes.

ok, wow. So Desktop is keeping it then?

adroc_thurston · Jun 3, 2024

poke01 said:
So Desktop is keeping it then?

No.
Just server.
Remember, Intel doesn't really have separate DT core variants, it's client and server.

poke01 · Jun 3, 2024

Hulk said:
If Skymont actually performs like Raptor Cove then the E's will finally fulfill their promise.

So Lion Cove will include HT after all.

If Skymont can equal Raptor Cove IPC and runs at 4.6GHz and Lion Cove does 5.4GHz nT and achieves a 15% bump over Raptor Cove than ARL should do a little over 48,000 CB R23 MT.

Zen 15 based on AMD's charts should do about 45,000 in CB R23 MT.

Now on top of all that speculation we don't know if those clocks for ARL are "burning down the house" or achievable with moderate air cooling.

As it has been for the last few generations I think the top of the stack parts for AMD and Intel are once again going to be very comparable.

~~umm. ARL should beat Zen 5 easy~~
TBD. Desktop does not have SMT

poke01 · Jun 3, 2024

This asus guy really drags the keynotes lol

Saylick · Jun 3, 2024

ASUS Johnny as enthusiastic as ever, I see... lol

adroc_thurston · Jun 3, 2024

poke01 said:
TBD

LNC is 14% moar PPC over RWC, which in itself was a ~4% PPC regression over RPC laptop (that's with 1.25MB L2) and the latter itself was a wee bit slower than the DT one with 2MB L2.
tl;dr it's that funny situation where everyone loses and gets a good laugh.

Gideon · Jun 3, 2024

Chips and cheese Lion Cove detials up:

Intel’s Lion Cove Architecture Preview

Intel’s P-Core’s lineage can be traced all the way back to the P6 architecture that was originally found in the Pentium Pro. From the Pentium Pro to Pentium III to Sandy Bridge to Golde…

chipsandcheese.com

gdansk · Jun 3, 2024

On the otherhand the P core doesn't look great. ~14% going from Intel 7 to N3E... and clock rates regress a bit?
And we're disappointed with Zen 5.
We need the mont team to save x64.

adroc_thurston · Jun 3, 2024

gdansk said:
14% going from Intel 7 to N3E... and clock rates regress a bit?

That's 14% over RWC. Not RPC. Not the desktop one either.

poke01 · Jun 3, 2024

Gideon said:
Chips and cheese Lion Cove detials up:

Intel’s Lion Cove Architecture Preview

Intel’s P-Core’s lineage can be traced all the way back to the P6 architecture that was originally found in the Pentium Pro. From the Pentium Pro to Pentium III to Sandy Bridge to Golde…

chipsandcheese.com

"This means that while Lunar Lake may not support Hyperthreading, other products like Arrow Lake or a hypothetical future server CPU that use future P-Cores could support Hyperthreading if the application can benefit from it."

I guess we waitr for Intel to confirm

Saylick · Jun 3, 2024

I think this is the point in the presentation where I turn off the TV and read the press slides instead...

poke01 · Jun 3, 2024

Saylick said:
I think this is the point in the presentation where I turn off the TV and read the press slides instead...

The only keynotes I semi-fully watch are Apple ones. Cause they have fluff but not like this partner boredom

adroc_thurston · Jun 3, 2024

poke01 said:
Cause they have fluff but not like this partner boredom

do i have to poast that cringe econerd sustainability song that kills every braincell at once

Saylick · Jun 3, 2024

At some point after the dust settles, we're going to need a nice place to do a proper comparison of all these cores. Just super interesting to see how they stack up in PPA. Exciting times.

adroc_thurston · Jun 3, 2024

Saylick said:
At some point after the dust settles, we're going to need a nice place to do a proper comparison of all these cores. Just super interesting to see how they stack up in PPA. Exciting times.

Yeah, shame we can't do Z4c versus SKT isonode.

poke01 · Jun 3, 2024

adroc_thurston said:
do i have to poast that cringe econerd sustainability song that kills every braincell at once

the eco stuff annoys me as well.

Saylick · Jun 3, 2024

adroc_thurston said:
Yeah, shame we can't do Z4c versus SKT isonode.

None of the comparisons will be iso-node, but it doesn't mean we can't estimate it. The silver lining is that Skymont is on a TSMC node, whom publishes detailed scaling parameters between their own nodes. It mitigates at least that variable.

adroc_thurston · Jun 3, 2024

Saylick said:
The silver lining is that Skymont is on a TSMC node, whom publishes detailed scaling parameters between their own nodes. It mitigates at least that variable.

Comparatively Z4c should have more SRAM in core due to xboxhueg opcache so SKT should have an area advantage, particularly on N3b.

Henry swagger · Jun 3, 2024

Hulk said:
If Skymont actually performs like Raptor Cove then the E's will finally fulfill their promise.

So Lion Cove will include HT after all.

If Skymont can equal Raptor Cove IPC and runs at 4.6GHz and Lion Cove does 5.4GHz nT and achieves a 15% bump over Raptor Cove than ARL should do a little over 48,000 CB R23 MT.

Zen 15 based on AMD's charts should do about 45,000 in CB R23 MT.

Now on top of all that speculation we don't know if those clocks for ARL are "burning down the house" or achievable with moderate air cooling.

As it has been for the last few generations I think the top of the stack parts for AMD and Intel are once again going to be very comparable.

8+32 refresh will still come and increase the performance lead 😀

gdansk · Jun 4, 2024

🤔 Really don't know what to make of that. Looks like for embarassingly parallel workloads it comes down to Z5's all core boost and whether or not desktop Arrow Lake has SMT. Or if AVX-512 comes out to play.

But the team behind Skymont shows that x64 isn't dead. "Throw more decoders at it bro, maybe it'll keep scaling." And lo, it did (so far).

controlflow · Jun 4, 2024

LNL is going to rain pretty hard on the Snapdragon X and ARM parade. The main issue Intel has is Qualcomm shipping a few months earlier.

Saylick · Jun 4, 2024

adroc_thurston said:
Comparatively Z4c should have more SRAM in core due to xboxhueg opcache so SKT should have an area advantage, particularly on N3b.

I wasn't thinking about going super detailed with estimating what size Zen 4c would be if ported to TSMC N3b by breaking out the logic and SRAM components. Realistically, would have used TSMC's 1.35x higher density and called it a day.

But yeah, Zen has a disadvantage due to how much cache AMD likes to use with their cores. Meanwhile it's the reverse with Skymont and its lack of L3 (I think?).

gdansk said:
🤔 Really don't know what to make of that. Looks like for embarassingly parallel workloads it comes down to Z5's all core boost and whether or not desktop Arrow Lake has SMT. Or if AVX-512 comes out to play.

But the team behind Skymont shows that x64 isn't dead. "Throw more decoders at it bro, maybe it'll keep scaling." And lo, it did (so far).

At some point I have to imagine all designs have to converge. If Pat promotes the Mont team and they scrap the P cores in favor of scaling up the E cores to hit higher PPA, I suspect the E cores will eventually hit a wall of diminishing returns that will make it basically on par with Zen 5. I'm specifically using Zen 5 in this example because it clearly has better PPA than Lion Cove imo.

poke01 · Jun 4, 2024

https://twitter.com/x/status/1797830413739770357

Looks good. Now this is a true low power chip.

majord · Jun 4, 2024

Did he not even talk about Arrow lake or did I miss something ? (other than mentioning it before going on about Panther lake)

Guess I'll hit up the slides

gdansk · Jun 4, 2024

Anandtech has N3E for the compute tile - is that a typo?

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