Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

Senior member
Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Arrow Lake Refresh (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXDesktop OnlyMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025		Q4 2025 ?Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E8P + 32E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ??8 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

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O

ondma

Platinum Member
Mar 18, 2018
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SiliconFly said:
Zen5 & ARL should have similar ST. And top-end X3D will be matched by ARL desktop Ultra 9 KS or equivalent. There shouldn't be much of a difference in ST.

And it's definitely a completely different ballgame in MT. ARL 8+32 is not just gonna crush top-end Zen5 X3D in MT, it's gonna be a complete bloodbath.

Unquestioned leadership in MT.
Click to expand...
If we see it at all 8+32 will be ARL-R (refresh) at the earliest, right? I think it will be a victory of sorts if ARL can trade blows with Zen 5 in both ST and MT. The problem is that it is late to market. ARL would have been a great product if it had come out instead of RL-R. But coming out after Zen 5, it will just be a catch up, and Intel will most likely be behind again when Zen 6 comes out. So at best, in desktop, which is the only thing that interests me personally, I see Intel alternating between parity and being behind for the foreseeable future. I dont really see a scenario where they are leading in performance, unless AMD falters or there is in fact a Royal Core somewhere in the pipeline that eventually that will be a game changer.
 
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H433x0n

Golden Member
Mar 15, 2023
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ondma said:
Dont forget there will be a clock speed regression of 5-10% at least, and a IPC 20% seems a bit high. So final result, I would think 10% faster than RC ST would be an acceptable result. As for MT, if the E cores are as good as the predictions, there should be plenty of horsepower for a good MT performance. It will depend on temps and power usage, i.e. what clocks they can hold in full core load.
Click to expand...
Depends on if the leaked figures for ARL-S QS silicon is correct, those figures would suggest a 5% clock regression.

ondma said:
If we see it at all 8+32 will be ARL-R (refresh) at the earliest, right? I think it will be a victory of sorts if ARL can trade blows with Zen 5 in both ST and MT. The problem is that is is late to market. ARL probably would have been a great product if it had come out instead of RL-R. But coming out after Zen 5, it will just be a catch up, and Intel will be behind again when Zen 6 comes out.
Click to expand...
As of now the 8+32 SKU is dead.
 
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SiliconFly

Golden Member
Mar 10, 2023
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ondma said:
If we see it at all 8+32 will be ARL-R (refresh) at the earliest, right? I think it will be a victory of sorts if ARL can trade blows with Zen 5 in both ST and MT. The problem is that is is late to market. ARL probably would have been a great product if it had come out instead of RL-R. But coming out after Zen 5, it will just be a catch up, and Intel will be behind again when Zen 6 comes out.
Click to expand...
H433x0n said:
Depends on if the leaked figures for ARL-S QS silicon is correct, those figures would suggest a 5% clock regression.


As of now the 8+32 SKU is dead.
Click to expand...
8+16 is more than sufficient to kill the competition in MT.
 
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H

H433x0n

Golden Member
Mar 15, 2023
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SiliconFly said:
8+16 is more than sufficient to kill the competition in MT.
Click to expand...
It's boring but I'd wait until 3rd party benchmarks. I personally think ARL-S will do fine in the typical reviewer 1T & nT workloads (especially if it has HT enabled).

The big question is memory latency and how it effects gaming performance. There's also the question of how well does CAMM2 memory perform compared to UDIMM memory. Apparently CAMM2 is worth +400Mts on its own over UDIMM. It's possible ARL-S has tons of memory bandwidth with poor latency and its gaming performance could be hit or miss depending on the title.
 
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Hulk

Diamond Member
Oct 9, 1999
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Seems like Skymont has "legs." I am wondering how many more transistors it would need to equal or surpass Lion Cove? Seems like there is a lot of budget there to make that happen and still save die space, assuming both the big and little cores were Skymont architecture based.

I am also wondering if Lion Cove is a more general purpose architecture as compared to Skymont and there might be specific compute domains where Skymont might fall badly on its face and that is why Lion Cove must be present?

Of course there is the clock speed issue as well but that could probably be addressed in a redesign.

From an area vs. performance perspective Skymont vs. Lion Cove is reminding me of Core vs. Net Burst.
 
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SiliconFly

Golden Member
Mar 10, 2023
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Tigerick said:
View attachment 97009
View attachment 97010
View attachment 97011



As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Arrow Lake Refresh (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXDesktop OnlyMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025		Q4 2025 ?Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E8P + 32E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ??8 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake

View attachment 90388

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

View attachment 90627
Click to expand...
@Tigerick

Can you pls update the top post with Lunar Lake details. If possible with one of the labelled die shot. Exciting times!
 
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dullard

Elite Member
May 21, 2001
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Hulk said:
Well, I'm normally not a fan of on package memory, in the case of lunar lake, it's fine. They are offering either 16 or 32 GB and those are the right numbers.
Click to expand...
I think of the many dozens of computers that I've worked on, I've only upgraded the memory on two of them. One needed it, the other was just for fun since I merged two ancient computers into one slightly better one. If an enthusiast like me rarely upgrades memory, regular users will do it far less often. I can see why companies make the decision for fixed memory. Plus, this ultra thin laptop / tablet / gaming device / kiosk is not the typical use case for heavy memory needs.

But, I do agree with you that at least Intel choose good quantities.
 
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Hulk

Diamond Member
Oct 9, 1999
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If ARL is indeed 8+32 (or even 24) AND Skymont=Raptor Cove ST then that will be a monster CPU for MT for client. I lean towards believing Skymont is comparable to Raptor Cove because Intel also told us Gracemont was about equal to Skylake ST. I didn't believe it then but it turned out to be true.

Gracemont equaling the outdated Skylake architecture is one thing, but Raptor Cove is Skylake after 2 major and one minor update. Raptor architecture is still formidable today whereas Skylake was far behind the times when Alder Lake was released.

Lunar Lake and Zen 5 are looking to be great parts.
 
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Hulk

Diamond Member
Oct 9, 1999
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I apologize for all of my questions but what is the "memory side cache" on LL?

Also does anyone know of a place to download the entire LL slide stack?
 
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G

gdansk

Platinum Member
Feb 8, 2011
2,478
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Hulk said:
I apologize for all of my questions but what is the "memory side cache" on LL?

Also does anyone know of a place to download the entire LL slide stack?
Click to expand...
A system wide cache of 8MB which is thought to be primarily used by the E core cluster (and NPU)
 
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M

Magio

Junior Member
May 13, 2024
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trivik12 said:
https://twitter.com/x/status/1798324727733506249

Panther supposedly targets more segments than Lunar. So probably Tiger Lake to Lunar's Icelake kind of release.
Click to expand...
IIRC Panther Lake is supposed to cover the whole client side and bringing it all back to 18A (no clue how they're gonna have capacity for that, tho).

But I don't know if there'll be anything quite like LNL there, fully targeting the low power crown, with on package DRAM and all that. There should be a PTL-U, but for example the leaked Dell roadmap shows an entirely new XPS 13 SKU launching early 2026, after PTL but equipped with LNL still and only slated for a refresh when Nova Lake launches, unlike the XPS 14 and 16 which have a PTL refresh on the roadmap.

Of course things can change and that roadmap is unlikely to be fully accurate, but maybe this means PTL-U will have lower tier SKUs compared to LNL.
 
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T

Tigerick

Senior member
Apr 1, 2022
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Some updates from my source:
  • the core in ARL is slightly beefier. Beside higher clock speed, L2 cache is 3MB (vs 2.5MB on LNL). The e-core is on the Ringbus, so gets access to L3. Of course, it is still 4-tile design vs 2 tiles of LNL, memory controller is inside the SoC tile.
  • Next year, Intel might not launch the 8+32 version of ARL-S. It was in the roadmap before, now no more...
  • The reason might be Intel has to increase the TOPS of NPU to 40 due to Microsoft's mandate requirements. My source can't confirm which process new SoC tile is being fabbed.
It is early leaks, I will update if anything new come up.
 
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Ghostsonplanets

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Mar 1, 2024
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Tigerick said:
The reason might be Intel has to increase the TOPS of NPU to 40 due to Microsoft's mandate requirements. My source can't confirm which process new SoC tile is being fabbed.
Click to expand...
Can't they just use the new N4P GPU tile of Arrow Lake H to give the necessary TOPs for ARL-S Refresh next year?

The ARL H IGP tile brings back XMX while also clocking higher. Pretty sure it would be able to match the 40 TOPs requirement easily (Although the problem I think is that Desktop get a 64 XVE iGP while ARL H one is 128 XVE. So that's an area and cost increase either way).
 
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trivik12

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I thought NPU is just for laptops. I guess to call any desktop CPU as copilot plus you need one there as well. But wouldn't add on card be better for that. Its a waste of leading edge node space to use it for NPU.
 
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Ghostsonplanets

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Magio said:
Of course things can change and that roadmap is unlikely to be fully accurate, but maybe this means PTL-U will have lower tier SKUs compared to LNL.
Click to expand...
PTL-U is basically Lunar Lake but for mainstream. 4P + 4LPE and Xe³ Celestial Graphics but 1/2 GPU compared to LNL Xe².

It's basically a cheaper version of LNL. So it make sense that there's no LNL successor because LNL by itself is a new swimlane and future generations will depend on the success of the product itself. If it does well, it will be iterated on. If it doesn't, it suffer the same fate as Core M.
 
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Ghostsonplanets

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Mar 1, 2024
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Hulk said:
I apologize for all of my questions but what is the "memory side cache" on LL?
Click to expand...
If you're familiar with mobile phones SoC, you might have heard of Memory Side Cache as SLC (System Level Cache) or LLC (Last Level Cache).

It's basically a buffer cache structure in-between the last level of cache of the CPU and the memory dram to avoid unnecessary dram requests and reduce energy, while also providing a increase in available bandwidth.

On Lunar Lake, the CPU and NPU can make usage of it. The Xe² GPU doesn’t because by itself it has a L2 cache of 8MB.
 
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Hulk

Diamond Member
Oct 9, 1999
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I find it very gutsy that Intel is using TSMC's N3B for the compute tile. When Arrow Lake or Panther Lake are released using Intel nodes we are going to have a pretty good head-to-head comparison of how these competing nodes perform on similar architecture.

Did they "have" to use TMSC for LL to make it successful because their comparable node wasn't ready, which is an outright admission they are behind in process tech? If so then they must be pretty confident in their process roadmap fulfilling performance expectations.

Bold move Intel. I like it.
 
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Ghostsonplanets

Senior member
Mar 1, 2024
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Hulk said:
Did they "have" to use TMSC for LL to make it successful because their comparable node wasn't ready
Click to expand...
Yes. When ARL and LNL were well into development, Intel had no comparable node and was stuck on Intel 10. So they had no choice but to go to TSMC.

ARL and LNL were also greenlighted/started development when Brian and later Bob were looking at whether Intel would keep their foundry structure or revamp it/spun-off it. The allocation and first access orders to TSMC next generation N3 node was done under Bob tenure back in 2020. Hence why both use TSMC.

Pat new IDM 2.0 structure though gives freedom to their Product Teams to choose whichever node suits their product best. So we might see future Intel products using TSMC bleeding nodes still. But the pressure is there for the teams to return towards Intel Foundry manufacturing only.
 
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