Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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techjunkie123

Junior Member
May 1, 2024
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Do we have any leaks on how strix will compare to Phoenix in terms of battery life under light - medium loads?

I'm really curious what the power/performance curves for Zen 5 will be like. Hopefully they're better than Phoenix and the uncore power is also better!
 
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Mopetar

Diamond Member
Jan 31, 2011
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If Zen5 X3D will be released already in September, are any of you intending to buy the vanilla variant in July anyway and if so why?

I think that's going to depend more on how those parts stack up against the 7800X3D for many people.

AMD has already stated that they don't expect their new CPUs to handily beat the Zen 4 v-cache parts, so I think unless there are some important titles where the new parts are clear winners, that few people will be tempted to upgrade.

Anyone on an older platform will just go for the best chip, even if it's an older Zen 4 CPU since it's the same platform either way. Maybe some people will consider Zen 5 if it's cheaper for similar performance, but the only people who I think will definitely upgrade are those running a lot of AVX-512 code as that's the most obvious advantage that Zen 5 brings to the table.
 

CouncilorIrissa

Senior member
Jul 28, 2023
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Counting the mm2 but double vector bandwidth and a full rate AVX-512?
Doesn't really add up, dis. Seems like a pretty easy cut if they wanted to save area at all costs.
They added some places and took away in other. But that's not unusual.
Probably a consequence of running the same design on client and server (full rate AVX-512). Good for Turin, but not that relevant for GNR and STX.
 

SarahKerrigan

Senior member
Oct 12, 2014
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Cutting the PRF (or any other core-private resource for that matter) would be a first for any Zen IIRC?

And would be extremely out of character for how AMD has generally worked.

I expect Zen 5 to largely just be Zen 5, not "here's Zen 5 but with fewer physical registers here, a smaller scheduler there, an extra cyc of latency on the FMA..."
 

CouncilorIrissa

Senior member
Jul 28, 2023
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And would be extremely out of character for how AMD has generally worked.

I expect Zen 5 to largely just be Zen 5, not "here's Zen 5 but with fewer physical registers here, a smaller scheduler there, an extra cyc of latency on the FMA..."
Yes, usually they design a core and that's what you get across the entire product stack. I think they only customised the FPU for PS5, but that's semi-custom business.
 
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SarahKerrigan

Senior member
Oct 12, 2014
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Yes, usually they design a core and that's what you get across the entire product stack. I think they only customised the FPU for PS5, but that's semi-custom business.

Yep. Thing is, parameterization of stuff like that often costs more in dev/validation than you save in an incrementally smaller core variant. AMD has been wise to mostly avoid it thus far.

I think anyone believing that Strix Zen 5 will somehow be a materially worse microarchitecture than desktop Zen 5 is going to be disappointed.
 

Goop_reformed

Senior member
Sep 23, 2023
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Yep. Thing is, parameterization of stuff like that often costs more in dev/validation than you save in an incrementally smaller core variant. AMD has been wise to mostly avoid it thus far.

I think anyone believing that Strix Zen 5 will somehow be a materially worse microarchitecture than desktop Zen 5 is going to be disappointed.
What if the actual uplift is only +10%, that should satisfy both views
 
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