Not in most cases, but it relies on having to invoke a thread prioritization scheme not needed for the vanilla part, so more complexity. You see people on various forums talking about how they run their own separate software to lock processes to one of the CCD's in order to avoid it choosing the less optimal one (cache vs speed). I'd prefer not to deal with that until I have to.Well, what would be the practical problem of 2 CCD X3D on Zen5? Are you expecting it to perform worse than the corresponding vanilla variant?
Both AMD and Intel recommend W11 for 'better' thread prioritization logic, whether it be hardware support or just a software scheme. Again, I'll just delay dealing with that as long as W10 is supported.And what problems are you expecting with Zen5 X3D on Win11/12?
See I told you Strix had mediocre 1t.View attachment 101536
The bean counters are counting the mm2 at AMD.
Then there are lamentations and the weeping and gnashing of teeth for thenonbelievers of the bigly IPC gainz
While it does look like AMD's bean counters keep making questionable decisions about every mm², it is easy for cores to get too big too.View attachment 101536
The bean counters are counting the mm2 at AMD.
Then there are lamentations and the weeping and gnashing of teeth for thenonbelievers of the bigly IPC gainz
Cinebench/SPEC is more honest than nowdays GB.You all should really wait for a GB5-6 run with properly reported clocks at this point.
You're not getting a SPEC run data before Geekerwan has his hands on the thing, and Cinebench is straight up useless. It measures CPU performance at one particular renderer. Only CPU-Z is more pointless realistically.Cinebench/SPEC is more honest than nowdays GB.
I’m pretty sure David Huang tested it properly. He doesn’t have the notoriety of Geekerwan but he produces quality data nonetheless. He did a ton of testing on Zen 4 & 4C. He also produced that MTL graph that charts Redwood Cove against Zen 4 in spec2017 as well.You all should really wait for a GB5-6 run with properly reported clocks at this point. We're likely getting those in the next 4 weeks. This flip-flopping between DOA and 32% is tiring.
I'm not denying his credibility, but the only thing he gave us is a range of (-4%, 26%) at an undefined set of workloads with firmware that is most likely still a work-in-progress.I’m pretty sure David Huang tested it properly. He doesn’t have the notoriety of Geekerwan but he produces quality data nonetheless. He did a ton of testing on Zen 4 & 4C. He also produced that MTL graph that charts Redwood Cove against Zen 4 in spec2017 as well.
He gave an average of the tests he ran and said the average was less than 16%. Based on his previous work with Zen 4 one of the tests included in that average was probably Spec2017 since he has ran that in all of his tests.I'm not denying his credibility, but the only thing he gave us is a range of (-4%, 26%) at an undefined set of workloads with firmware that is most likely still a work-in-progress.
I wonder why he did not mention SIR2017 as that would be the best reference point. It won't be long until we see the GR results, no point bickering about leaks like this when we are so close to the launch.He gave an average of the tests he ran and said the average was less than 16%. Based on his previous work with Zen 4 one of the tests included in that average was probably Spec2017 since he has ran that in all of his tests.
I suppose it’s possible that the firmware is incomplete but we’re close enough to release that the laptops are being flashed with firmware to be packaged and shipped at this point.
I wonder why he did not mention SIR2017 as that would be the best reference point. It won't be long until we see the GR results, no point bickering about leaks like this when we are so close to the launch.
Eh, not quite, Naples to Rome to Milan had total of chungus socket score bumps at a relatively puny membw increment (2666 -> 3200).but full-socket _rate is STREAM with extra steps.
Because he also does actual microbenchmarking.I wonder why he did not mention SIR2017 as that would be the best reference point
Oh, so it is confirmed it's split CCXes? Hmm, I guess that was to be expected but I held slight hope.We already know Strix L3 (16MB for Zen5 CCX, 8MB for Zen5c CCX).
I would check out his old articles to see how he usually does his benchmarks. His older stuff is an interesting read anyway.I wonder why he did not mention SIR2017 as that would be the best reference point. It won't be long until we see the GR results, no point bickering about leaks like this when we are so close to the launch.
true, SPEC and a proper GB5 test will reveal all.You all should really wait for a GB5-6 run with properly reported clocks at this point. We're likely getting those in the next 4 weeks. This flip-flopping between DOA and 32% is tiring.
Not in most cases, but it relies on having to invoke a thread prioritization scheme not needed for the vanilla part, so more complexity. You see people on various forums talking about how they run their own separate software to lock processes to one of the CCD's in order to avoid it choosing the less optimal one (cache vs speed). I'd prefer not to deal with that until I have to.
Oh, so it is confirmed it's split CCXes? Hmm, I guess that was to be expected but I held slight hope.
What’s so special about 3 nm compared to other node advancements? And are you expecting Zen6 to use that, so it’s likely to be a bigger jump compared to previous CPU generation than Zen4->Zen5 is?AMD crammed things on Zen4 to dig double digits performance uplift without turn Z5 a power hog. But 3nm is where should be Nirvana todays.
What’s so special about 3 nm compared to other node advancements? And are you expecting Zen6 to use that, so it’s likely to be a bigger jump compared to previous CPU generation than Zen4->Zen5 is?
if true, Apple got an avg improvement of 7% in 7 months and achieved more than AMD did in 22 months. This makes M4 look very good.View attachment 101565
A few more comments on the benchmarks he ran on Strix.
That is so so bad lmaoView attachment 101565
A few more comments on the benchmarks he ran on Strix.
Let’s see how Lunar and Arrow turn out. So far, Strix is disappointing.That is so so bad lmao
About the sameLet’s see how Lunar and Arrow turn out. So far, Strix is disappointing.