Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	8 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Arrow Lake Refresh (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Desktop Only	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2025 ?	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	8P + 32E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	?	8 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

SiliconFly · Jun 21, 2024

dullard said:
More performance, less power. Why wouldn't you want that. Unless you fall into the false belief that you want P cores for things like gaming.

How about 2P+40E? I can already hear @ondma screaming!

Tbh, ST performance is king (even now). It's way more important than MT. More ST, much better. Even for mundane tasks like browsing or office apps.

A thought experiment. Imagine having 256 cores that run at 1x speed each or just 2 cores that run at 100x speed each. Every single app will do better on the 2 cores. Not just games, even browsers. They'll run at blinding speed.

Most of the people don't benefit fully from having tons of cores. It's mostly bragging rights. But almost everyone benefits from having very high ST. Higher ST rules!

Wolverine2349 · Jun 21, 2024

SiliconFly said:
How about 2P+40E? I can already hear @ondma screaming!

Tbh, ST performance is king (even now). It's way more important than MT. More ST, much better. Even for mundane tasks like browsing or office apps.

A thought experiment. Imagine having 256 cores that run at 1x speed each or just 2 cores that run at 100x speed each. Every single app will do better on the 2 cores. Not just games, even browsers. They'll run at blinding speed.

Most of the people don't benefit fully from having tons of cores. It's mostly bragging rights. But almost everyone benefits from having very high ST. Higher ST rules!

Yes agree assuming by single thread more than 1 core but not spammed with so many and thus too many cores.

Like 8-12 high performing cores on a single node is the sweet spot. Too bad it maxes out at 8 on a single node/die/ring bus/CCX from either company.

Best balance of multi thread and single thread and lightly threaded and finite threaded performance for consumer desktop and gaming.

ondma · Jun 21, 2024

From Digitimes Asia:
Some more confirmation that Lunar Lake is delayed: Lunar Lake not shipping until September instead of expected June.
This means LL laptops will miss the back to school sales rush for sure, and may have poor availability for the end of year holiday season.
Speculation is that it is due to poor yields on the TSMC N3B node.
Wonder what that means for ARL availability?? (rhetorical question, BTW) 5 or 6 months behind Zen 5 may not be such a stretch after all.
Yes, I know the article did not mention ARL specifically, but since the highest end chips are on the same node, and Intel has switched priority to LL, further delays to ARL definitely seem possible.

dullard · Jun 21, 2024

ondma said:
From Digitimes Asia:
Some more confirmation that Lunar Lake is delayed: Lunar Lake not shipping until September instead of expected June.
This means LL laptops will miss the back to school sales rush for sure, and may have poor availability for the end of year holiday season.
Speculation is that it is due to poor yields on the TSMC N3B node.
Wonder what that means for ARL availability?? (rhetorical question, BTW) 5 or 6 months behind Zen 5 may not be such a stretch after all.
Yes, I know the article did not mention ARL specifically, but since the highest end chips are on the same node, and Intel has switched priority to LL, further delays to ARL definitely seem possible.

TSMC just started producing Lunar Lake tiles this Tuesday. There was absolutely no possible way they would be a June launch. The tiles can't be produced, shipped to Intel, assembled, tested, packaged, and shipped to OEMs in any quantity in a week and a half. No, it will be a Q3 2024 launch that has been reported for quite some time, not a Q2 launch in June.

TSMC Begins 3 nm Production for Intel's "Lunar Lake" and "Arrow Lake" Tiles

TSMC has commenced mass-production of chips for Intel on its 3 nm EUV FinFET foundry node, according to a report by Taiwan industry observer DigiTimes. Intel is using the TSMC 3 nm node for the compute tile of its upcoming Core Ultra 300 "Lunar Lake" processor. The company went into depth about...

www.techpowerup.com

dullard · Jun 21, 2024

SiliconFly said:
How about 2P+40E? I can already hear @ondma screaming!

Tbh, ST performance is king (even now). It's way more important than MT. More ST, much better. Even for mundane tasks like browsing or office apps.

A thought experiment. Imagine having 256 cores that run at 1x speed each or just 2 cores that run at 100x speed each. Every single app will do better on the 2 cores. Not just games, even browsers. They'll run at blinding speed.

Most of the people don't benefit fully from having tons of cores. It's mostly bragging rights. But almost everyone benefits from having very high ST. Higher ST rules!

You hit a point of diminishing returns on the power/performance graphs. Pumping ~125 W / 2 = ~62.5 W into each of two P cores won't really get you much performance gains. That is, even if they could be cooled at that power (heck, it would be a lot worse at turbo power levels). At least from what I've seen in past chips (I can't predict future chips), the sweet spot is much closer to 6 P cores.

Plus, there are plenty of software programs that require 4 or 6 fast threads. Those might come to a crawl on a 2P+40E chip. But, there is a much smaller subset of software that needs more than 6 fast threads, but less than 9, and can't use the E cores efficiently. In fact, I can think of no software that fits that bill. That is why I like the 6 P core design for fast ST performance and fill the rest with as many E cores as is reasonable in the power budget for MT performance.

SiliconFly · Jun 21, 2024

(Based on publicly available info. Not a leak)

Just came across this regarding Rentable Units. Sounds bad.

This was posted by Ian 2 years ago.

Some background: Back in 2016, Ian wrote an AT article on Soft Machines VISC. Then, a few years ago, there were rumors that Intel is working on Rentable Units and it's based on its soft machines acquisition. Back in Oct 29, 2020, Intel did apply for a patent based on the same. But in 2022, Ian said that it got mothballed. No more news beyond that. Thats a serious concern.

Also, some of these factors like design & hardware complexity, increased die area and power usage might also have contributed to the decision. Can't confirm.

It appears, RU rumor is gonna stay just a rumor after all.

Henry swagger · Jun 21, 2024

SiliconFly said:
(Based on publicly available info. Not a leak)

Just came across this regarding Rentable Units. Sounds bad.

This was posted by Ian 2 years ago.

View attachment 101621

Some background: Back in 2016, Ian wrote an AT article on Soft Machines VISC. Then, a few years ago, there were rumors that Intel is working on Rentable Units and it's based on its soft machines acquisition. Back in Oct 29, 2020, Intel did apply for a patent based on the same. But in 2022, Ian said that it got mothballed. No more news beyond that. Thats a serious concern.

Also, some of these factors like design & hardware complexity, increased die area and power usage might also have contributed to the decision. Can't confirm.

It appears, RU rumor is gonna stay just a rumor after all.

he is wrong lol

AMDK11 · Jun 21, 2024

Regarding Lion Cove, Intel, emphasizing the division of the schedule into separate for ALU and separate for FPU, shows P-Core graphics with 10x ALU and 8x FPU for future generations

DavidC1 · Jun 21, 2024

ondma said:
From Digitimes Asia:
Some more confirmation that Lunar Lake is delayed: Lunar Lake not shipping until September instead of expected June.

Ok, but Digitimes is a hit-and-miss. Was it ever delayed or is it like the Meteorlake GPU tile, N5 or N3 question? It was never N3, but outlets reported that they had problems and they had to use N5 or some nonsense.

@AMDK11
Regarding Lion Cove, Intel, emphasizing the division of the schedule into separate for ALU and separate for FPU, shows P-Core graphics with 10x ALU and 8x FPU for future generations

That just tells me that they are expanding without much thought. Like 8x branch capability. All that for 14% gain?

DavidC1 · Jun 21, 2024

SiliconFly said:
Also, some of these factors like design & hardware complexity, increased die area and power usage might also have contributed to the decision. Can't confirm.

It appears, RU rumor is gonna stay just a rumor after all.

If you listen to what @Exist50 has been saying then he expects it post-2026 or even later. That doesn't sound like a project without significant issues.

Yea I hope the E core team continues to execute. Arctic Wolf = 30% and in two years another 30% gain? Now we're threatening not just the P core team from both companies, but Apple.

Hulk · Jun 21, 2024

Wolverine2349 said:
Well wouldn't it be just as performant single thread as doesn't single thread mean only 1 core? Or does single thread also mean more than 1 core, but limited amount beyond 1 core for SMT?

Almost nothing outside of ST benchmarks are single thread. But, there are applications that will spawn quite a few threads but only really put pressure on 2 or 3, or maybe 4 or 5. That is what I mean by ST performance. If these "supporting threads" are carried by Raptor strength Skymont cores we might only need 4 or 6 Lion Cove cores.

The E's don't look to be the weaklings they used to be.

Hulk · Jun 21, 2024

Also, one nice thing about the Intel hybrid architecture is that we can test various configurations. 6+12 or 8+8 in different applications and see if the result is what we expect?

Let's do some of that once ARL arrives and see how the various configurations perform. We could each take a different software application and test a few configurations and then compile in a spreadsheet.

tamz_msc · Jun 21, 2024

Regarding the lack of HT, now I just run my Tiger Lake with HT off. Everything feels snappier - especially initial startup. Like it is much faster to settle down after a fresh Windows boot.

App launch time has decreased, even responsiveness within apps has noticeably improved.

I have little doubt that Lion Cove will feel even more responsive than Raptor Lake, despite the lack of HT and "only" a 14% IPC uplift.

dullard · Jun 21, 2024

Hulk said:
The E's don't look to be the weaklings they used to be.

That, and the impression that many people stick with of the E cores is from initial reviews before any software was coded to differentiate the cores. It doesn't take much effort to specify the proper core to run on when starting a thread. And no one knows better than the programmer what emphasis the thread should have. Each day when more software comes out or older software is upgraded, the E cores get utilized better and better.

DrMrLordX · Saturday at 1:52 AM

Ghostsonplanets said:
Afaik 8+32 was cancelled in favor of bigger NPU on ARL-R.

Ugh why. You don't need an NPU on desktop skus. They have discreet graphics to cover that base, unless it's some kind of latency-sensitive AI workload.

Spamming even more e-cores (regardless of how good they are compared to previous-gen e-cores) isn't exactly the best idea because Amdahl's Law does bite you in the end, but sacrificing die area to an NPU seems even less useful.

ondma · Saturday at 2:12 AM

Hulk said:
Almost nothing outside of ST benchmarks are single thread. But, there are applications that will spawn quite a few threads but only really put pressure on 2 or 3, or maybe 4 or 5. That is what I mean by ST performance. If these "supporting threads" are carried by Raptor strength Skymont cores we might only need 4 or 6 Lion Cove cores.

The E's don't look to be the weaklings they used to be.

How about gaming? Are games going to finally be able to use the E cores?

SiliconFly · Saturday at 5:17 AM

Henry swagger said:
he is wrong lol

I sincerely hope he's wrong about RU.

TESKATLIPOKA · Saturday at 5:31 AM

tamz_msc said:
I have little doubt that Lion Cove will feel even more responsive than Raptor Lake, despite the lack of HT and "only" a 14% IPC uplift.

HT has nothing to do with the CPUs responsiveness.

TESKATLIPOKA · Saturday at 5:42 AM

dullard said:
More performance, less power. Why wouldn't you want that. Unless you fall into the false belief that you want P cores for things like gaming.

For maxing that CPU 6P+24E you would need 30 threads, with HT It's 36. How many desktop Apps can use that many? Actually, more users would be hurt by dropping 2 P cores than having extra E-cores.

And P-cores are faster for gaming than E-cores, that's a fact.

If ARL does not have HT, then 8P+24E for 32 threads is my limit for desktop. Anything more is in my opinion server(cloud) market.

SiliconFly · Saturday at 6:48 AM

TESKATLIPOKA said:
HT has nothing to do with the CPUs responsiveness.

You seem to be too certain. Disabling HT might actually improve scheduling and responsiveness. Might be one of the key reasons some prefer to disable it.

Hulk · Saturday at 7:22 AM

TESKATLIPOKA said:
As for

For maxing that CPU 6P+24E you would need 30 threads, with HT It's 36. How many desktop Apps can use that many? Actually, more users would be hurt by dropping 2 P cores than having extra E-cores.

And P-cores are faster for gaming than E-cores, that's a fact.

If ARL does not have HT, then 8P+24E for 32 threads is my limit for desktop. Anything more is in my opinion server(cloud) market.

Good points. You might be right. That's why if some of us get ARL it would be interesting to do some testing.

TESKATLIPOKA · Saturday at 8:11 AM

SiliconFly said:
You seem to be too certain. Disabling HT might actually improve scheduling and responsiveness. Might be one of the key reasons some prefer to disable it.

Please read what I was quoting, when I wrote that. Then you will understand, why I wrote that.

AMDK11 · Saturday at 8:14 AM

DavidC1 said:
That just tells me that they are expanding without much thought. Like 8x branch capability. All that for 14% gain?

On average +14% IPC is without AVX512 and HT. The IPC curve of Zen 4 and Zen 5 includes AVX512 and probably SMT.

Going from ALU 5 to 6 is an increase of +20%.

We'll see how much ArrowLake will gain.

inf64 · Saturday at 9:05 AM

AMDK11 said:
On average +14% IPC is without AVX512 and HT. The IPC curve of Zen 4 and Zen 5 includes AVX512 and probably SMT.

Going from ALU 5 to 6 is an increase of +20%.

We'll see how much ArrowLake will gain.

You are giving too much credit to ALU increase. Zen 5 has 50% more ALU units (4 to 6) and gets "only" ~16% IPC according to AMD's number (the only one we have so far). If it were that easy to simply slap on ALU/AGUs or execution ports and get "free" IPC, everyone would have a field day. It's super complicated dance of resources and power and has 100s of variables. It's basically a tradeoff every time.

CouncilorIrissa · Saturday at 9:30 AM

inf64 said:
You are giving too much credit to ALU increase. Zen 5 has 50% more ALU units (4 to 6) and gets "only" ~16% IPC according to AMD's number (the only one we have so far). If it were that easy to simply slap on ALU/AGUs or execution ports and get "free" IPC, everyone would have a field day. It's super complicated dance of resources and power and has 100s of variables. It's basically a tradeoff every time.

Yes.
If unit and resource counts were all that mattered, then GLC would be far ahead of Persephone (Z4 core uarch), and it's on par.

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