Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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Geddagod

Golden Member
Dec 28, 2021
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Are you forgetting that LNC is a two node jump from GLC while Zen 5 is a half-node (at best) jump from Zen 4?
Node wise, Intel has the bigger jump,
And where do you get the idea that Intel didnt "try" for a massive core arch refresh? Isnt that what both Lion Cove and Skymont are?
Skymont yes, but as I said before...
And tbh, some parts of LNC don't seem to be buffed as much as a usual Intel tock is, like the ROB capacity or the uop cache capacity
If Arrow Lake doesnt show a massive jump in perf or perf/watt with a 2 node jump, its going to be a way bigger L than these results with Zen 5 we've seen thus far.
What makes you think we won't see a "massive" jump in perf/watt with ARL?
Last time Intel did major arch change on same node was Rocket Lake, and that was objectively their worst new CPU generation as far back as I remember.
That was in decent part due to the regressed core counts. Also compounded by the facts that SNC itself wasn't a great arch, and that the arch was way too wide for 14nm, meaning vs SKL, u only saw perf/watt improvements at a relatively high upper end of the perf/watt curve of RKL.
GLC vs WLC wasn't too bad tho, in perf/watt, IIRC.
 

Geddagod

Golden Member
Dec 28, 2021
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Looks like the forum's still boiling over from the Z5 mobile results.
I'd be the advocate of waiting for some likely fine-tuning in the next months, and it looks like a solid improvement in power consumption for an equal perf over Z4...but at the same time what's the point of bumping 8 Z4 cores to 12 Z5 cores if you're going to have the same perf, lel.
AMD clearly fumbled something. I might've considered that with a sufficient amount of power we'd see something stronger, but no. That's the laptop they sent to reviewers, it's likely that that's what the product's meant to be.
The option "AMD splurged on the core count to get some leeway with reviews" also isn't viable, at least not in this dimension. AMD never splurges.
12 Zen 5+ Zen5C cores don't have the same perf as 8 Zen 4 cores.
The ST perf uplift isn't anything to write home about tho lol.
I'm curious about what a hypothetical 12c (or 4+8 Zen 4 setup, whichever) would stack up vs Strix Point though.
 
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Goop_reformed

Senior member
Sep 23, 2023
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Node wise, Intel has the bigger jump, but core wise, Zen 5 seems like a much more radical departure than LNC is over GLC. And tbh, some parts of LNC don't seem to be buffed as much as a usual Intel tock is, like the ROB capacity or the uop cache capacity. I don't think the same can be said for Zen 5.
It's not like Intel tried for a massive core arch refresh and got mid results, they literally didn't try at all.
I would consider Zen 5 a bigger "meh" than LNC, but as a whole, the entire "which core is more disappointing vs expectations" shtick isn't really important in the end lol.
I'd argue 2 new cores is much more of a difference than just 1.
 

branch_suggestion

Senior member
Aug 4, 2023
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Splitting core to 2 different CCXs really hurt performance. Still don't understand why they did it, it seems that doing one 8-core hybrid CCX solution would have been better alternative.
To save power, same strat as every big.LITTLE part ever.
This is the first AMD mobile part to be designed for power efficient bloatmaxxing. Looks like it was meant for N3B but... curse TSMC for having a misstep.
Regressing in the GCC subtest after all the accolades about that zero-bubble, 2-branches BPU with 16k L1 BTB... Jesus, this is Bulldozer vibes.
Bulldozer also had horrible power and area eff on top of being slow.
Z5 is not that, at all.
 

majord

Senior member
Jul 26, 2015
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I go read a bunch of reviews, showing an overall good results.. , not great, but still forward progress at least.

Come in here, and people are calling it "Bulldozer 2.0" and s**t posting everywhere.. what the hell happened to this place? , it's like Circus sometimes.

Can't tell if it's butthurt fanboys of certain competitors that are going backwards instead of forwards, I don't know, but damn. Give it a rest.

That said, there are some disappointments ,and question marks.. Gaming performance seems lacklustre, ST performance not consistent, but then again literally every previous gen or current competitor in the reviews seems to be running at higher TDP's. I think we do need to wait a tad longer for some differetn devices and some better testings. nT perf and perf/watt otoh are great .

Anandtech's IGP gaming numbers are the only ones that are about where i'd expect it to be. Not sure why others are showing virtually zero uplift. I don't think AMD would have bothered adding any CU's if performance was going to be 100% constrained by BW or power.
 

LightningZ71

Golden Member
Mar 10, 2017
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Kraken Point MIGHT be interesting if they keep all 8 cores on the same CCX. Even keeping the L3 at 16MB would be OK. There may be some situations where it could even outdo the 10 core Strix Point SKU in situations where inter CCX communications kills performance or the 8MB L3 on the C ccx is weirdly restrictive.
 
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Geddagod

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Dec 28, 2021
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I'd argue 2 new cores is much more of a difference than just 1.
You can look at the specs that are out for LNC dude, they did not cram 2 cores worth of improvements into LNC. I genuinely think they barely did one. It's not like Intel increased the ROB entry capacity by 100%, doubled decoder width, and doubled the width of the renamer lol.

Also, even if Intel followed schedule, ARL would have been a single arch jump anyway. This is what I believe Intel's original goals might have been: GLC (new core) RWC (new node) LNC (new core).
Looking at the current schedule and what each should be: GLC (new core) RPC (optimization, should be new node) RWC (new node, should be new core), and then LNC (new core and new node, should new node). LNC, even with the delays, shouldn't be 2 cores worth of improvements.
I mean I kinda understand why people say LNC should have been 2 arch jumps worth of improvements, but even then I'm a bit iffy on that. I think there's valid arguments against that.
 

Abwx

Lifer
Apr 2, 2011
11,516
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So what's with the much higher power consumption with ST workloads on AMD/Intel APUs? Is the core power that much higher or uncore?

Any chance of being fixed in future generations?

View attachment 104096

All those numbers are inaccurate, better to look here for more precision :

 

techjunkie123

Member
May 1, 2024
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All those numbers are inaccurate, better to look here for more precision :


Numbers are different (lower), but trend is quite similar. M3 parts consume 3-4x less power for ST compared to Strix/Hawk/meteor. At least Strix looks better than Hawk point.


They have a new article: https://www.notebookcheck.com/AMD-Z...und-Qualcomm-Snapdragon-X-Elite.866997.0.html
 

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Ghostsonplanets

Senior member
Mar 1, 2024
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ASUS new bios increases iGP performance


Tested at 720p SteamDeck Preset No Upscaling

Does anyone have rumors or estimate of the die size of Kraken Point?
Figures I've saw being throwed some time ago was around 170 - 180mm²
From a customer perspective, why would anyone buy Kraken Point over Hawk Point?
It comply with the Microsoft marketing point, it will be featured into newer designs and with more design wins, it will have a branding that indicates it's a new generation part and will also slot into a cheaper price bracket than HWK.

It's not that hard. Most consumers don't track or care about it. They just want the newest shiny thing that can fit into their wallet and can work well with their stuff.
 

Abwx

Lifer
Apr 2, 2011
11,516
4,302
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Numbers are different (lower), but trend is quite similar. M3 parts consume 3-4x less power for ST compared to Strix/Hawk/meteor. At least Strix looks better than Hawk point.



They have a new article: https://www.notebookcheck.com/AMD-Z...und-Qualcomm-Snapdragon-X-Elite.866997.0.html

M3 consume much less because it throttle due to temperature, otherwise it use 10W in ST for 10 seconds at the begenning of the run.

The 370 use 18-20W in ST and the 155H 25-28W.
 

techjunkie123

Member
May 1, 2024
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M3 consume much less because it throttle due to temperature, otherwise it use 10W in ST for 10 seconds at the begenning of the run.

The 370 use 18-20W in ST and the 155H 25-28W.
True, I didn't catch the initial spike.

So I guess 2x worse ST power consumption for Strix. I guess that's not as bad (especially if M3 Pro etc are higher, plus N3B). Also promising that Strix has lower consumption compared to hawk point with better performance too. Maybe next gen will be even more competitive!
 
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Abwx

Lifer
Apr 2, 2011
11,516
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True, I didn't catch the initial spike.

So I guess 2x worse ST power consumption for Strix. I guess that's not as bad (especially if M3 Pro etc are higher, plus N3B). Also promising that Strix has lower consumption compared to hawk point with better performance too. Maybe next gen will be even more competitive!

Work in progress to summarize.

Otherwise in the NBC update that you linked the Pro Art score 1213 pts in CB 2024 while they measured it at 1099 pts in their first try wich was only 19% better than the Zenbook, that was weird because in CB R11.5, R15 and R23 the difference was 40% between the two laptops.

Edit : Seems that they have two different Pro Art models.
 
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techjunkie123

Member
May 1, 2024
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The peak ST power consumption will be 10 watts for all M3 series chips, they all clock at 4.05GHz.
Perhaps. I was basing my comment off NBCs measurements, which show higher ST power usage (but same score) for M3 pro and M3 max compared to M3. I rationalized this as worse power gating (of course I might be wrong, but bigger die for sure).

But maybe that's just because the M3 in the air throttles so the average consumption is lower....
 

MS_AT

Member
Jul 15, 2024
198
454
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So regarding the 0% SpecInt improvement that AnandTech got, I think it would be good to put in context of the test setup they are using. They mention they are using WSL, but don't mention the type [WSL1 vs WSL2, with 1 being a sort of emulation layer, 2 being a VM running Linux Kernel, and the default nowadays] plus rather old Clang version. In comparison David Huang used native Linux environment and more modern version of gcc, but its worth noting that in both setups compiler will not generate AVX512 instructions afaik.

Now, why that might be important is if they are using WSL the core pinning might not work as expected so you might not measure what you expect to measure. Especially when dealing with hybrid architectures. I am not familiar with internals of Spec, but I would expect that 1T run should be pinned to the core either by spec runtime itself or by the person running Spec for meaningful results.

That plus difference in compilers used might explain why AT measures 7.01 Spec rate for Zen4 but Huang is seeing 8.45 for a core locked at 4.8 GHz if I understand his table correctly. Correspondingly he measures 9.27 for Zen5 vs 7.02 AT got.

Now I am just trying to understand why AT result is different than what other test seems to suggest [GeekBench INT improvement is also better than 0, especially the compiler subtest of geekbench that could be used as a proxy of broad integer workload stressing different parts of the core, is showing something in the ballpark of low but cositient improvement ].
 
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