Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (20A)	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	Intel 20A	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Q1 2025 ?	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	6P + 8E ?	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	24 MB ?	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

511 · Aug 9, 2024

Shareholders don't realise how difficult,costly is to run FAB Manufacturing Buisness is especially in West Due to labour and various other stuff.There is a reason only Intel, Samsung,TSMC are the only 3 Leading edge logic Fab.Fab reporting from intel was going to be worse either way due to the horrendous cost structure of Intel 7 .

KompuKare · Aug 9, 2024

FlanK3r said:
Arrow Lake: the new generation CPUs have at least 100W lower power consumption while maintaining high frequecnies. The updated process eliminates previous high voltage issues, ensuring stability.
Performance details of the new generation are confidential but expected to be impressive.

Today leaks power plan of Arrow Lake...Still a lot for 3nm jump for Core Ultra 9 ... 295W powerlimit on Intel Extreme profile (pushed for reviewers)View attachment 104901

The one thing I was hoping for from Intel was a return to saner power limits. This does not bode well.

gdansk · Aug 9, 2024

511 said:
Shareholders don't realise how difficult,costly is to run FAB Manufacturing Buisness is especially in West Due to labour and various other stuff.T

Doesn't Samsung have one of their large 8nm fabs in Texas?
Not leading edge anymore but it was at the time and it seems they're planning to do it again.

Anyway I realize now this isn't the Intel financials thread.

dullard · Aug 9, 2024

KompuKare said:
The one thing I was hoping for from Intel was a return to saner power limits. This does not bode well.

So lets assume this table is correct (I didn't see any source that Jaykihn references).

There are 14 power drops (median 19.8% lower power setting). This is across all chips and all power settings of each chip.
There is 1 power setting increase (16.6% up but only for the i9, PL2, extreme power setting).

And you call that not boding well?

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inquiss · Aug 9, 2024

MoistOintment said:
I really don't see the investors having a case here. "Feeling misled" certainly isn't evidence. They need to point to specific lies.

They can talk about the "state of fabs" all they want - but Intel didn't ever have to report on the independent finances of fabs when they were a vertically integrated and proprietary to Intel's own internal designs. There were no "independent finances" of fabs prior to them being split off just like there's no independent profitability report of the HR department or IT department reported to investors.

Yeah, as I said I'm not talking about the intel case. More the general point that it's not always investors fault. There are exceptions.

ondma · Aug 9, 2024

AMDK11 said:
Can the premiere take place earlier?

Wont say, "I told you so" but ...... (not directed at you specifically)
I have said many times that ARL will be a 2025 product, ~6 months behind Zen5, trading blows in performance, and still using more power.
Intel may have caught a break, though, in that so far Zen 5 doesn't seem to be a home run either, especially in gaming.

Edit: Intel says ARL launch is not affected (yea, right), so I could still be wrong. But I still think good availability, even on desktop, wont be until 2025.

jdubs03 · Aug 9, 2024

ARL launch timing not affected:

Core Ultra 200 "Arrow Lake" on track, Intel promises 'significant announcements' this fall - VideoCardz.com

Intel to share more on Arrow Lake late this year Intel provided a brief statement to OC3D in response to the news about the postponement of the Innovation 2024 event. Questions were raised about how this delay will affect the launch of the Arrow Lake, which was expected to take place at this...

videocardz.com

ondma · Aug 9, 2024

dullard said:
So lets assume this table is correct (I didn't see any source that Jaykihn references).

There are 14 power drops (median 19.8% lower power setting). This is across all chips and all power settings of each chip.

There is 1 power setting increase (16.6% up but only for the i9, PL2, extreme power setting).

And you call that not boding well?

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Less than 20% power drop going from 7(or 10??) nm to 3 nm seems like a mediocre improvement, unless performance is significantly improved, which seems unlikely. And AMD has proven it is possible to get similar performance at much lower power. Intel's big cores desperately need a ground up redesign.

Geddagod · Aug 9, 2024

ondma said:
Less than 20% power drop going from 7(or 10??) nm to 3 nm seems like a mediocre improvement, unless performance is significantly improved, which seems unlikely. And AMD has proven it is possible to get similar performance at much lower power. Intel's big cores desperately need a ground up redesign.

I actually think LNC, Zen 4, and funnily enough Zen 5 along with that, are all going to have spectacularly similar spec2017 INT core/ring-power perf/watt graphs when Huang tests them out in a couple of weeks.

gdansk · Aug 9, 2024

Geddagod said:
I actually think LNC, Zen 4, and funnily enough Zen 5 along with that, are all going to have spectacularly similar spec2017 INT core/ring-power perf/watt graphs when Huang tests them out in a couple of weeks.

It's possible and, if so, incredibly disappointing.

dullard · Aug 9, 2024

ondma said:
Less than 20% power drop going from 7(or 10??) nm to 3 nm seems like a mediocre improvement, unless performance is significantly improved, which seems unlikely. And AMD has proven it is possible to get similar performance at much lower power. Intel's big cores desperately need a ground up redesign.

I would be careful with calling it less than 20% power drop. You are glossing over a lot of details there. Go with maximum power level settings to be more accurate. How long the CPUs are at their maximums determines the actual power usage.

Performance is significantly improved, but probably mostly in areas that you will claim not to care about.

inquiss · Aug 9, 2024

MoistOintment said:
I really don't see the investors having a case here. "Feeling misled" certainly isn't evidence. They need to point to specific lies.

They can talk about the "state of fabs" all they want - but Intel didn't ever have to report on the independent finances of fabs when they were a vertically integrated and proprietary to Intel's own internal designs. There were no "independent finances" of fabs prior to them being split off just like there's no independent profitability report of the HR department or IT department reported to investors.

I'm really sure why you're quoting me, I said I'm not commenting on this case for intel. To be clear, I'm not commenting on intel.

ondma · Aug 9, 2024

dullard said:
I would be careful with calling it less than 20% power drop. You are glossing over a lot of details there. Go with maximum power level settings to be more accurate. How long the CPUs are at their maximums determines the actual power usage.

Performance is significantly improved, but probably mostly in areas that you will claim not to care about.

I was using your numbers, dude.

Geddagod · Aug 9, 2024

gdansk said:
It's possible and, if so, incredibly disappointing.

Meh. Given what we have heard about TSMC N3 vs TSMC N4/N4P, two cores with similar IPC and clocks having similar perf/watt shouldn't be too surprising.
Core area is going to be interesting to see though.

dullard · Aug 9, 2024

ondma said:
I was using your numbers, dude.

My numbers, but you changed the words. The words matter.

SiliconFly · Aug 9, 2024

cebri1 said:
9.25%🤓

Had some free time. It's 9.383%

511 · Aug 10, 2024

Geddagod said:
I actually think LNC, Zen 4, and funnily enough Zen 5 along with that, are all going to have spectacularly similar spec2017 INT core/ring-power perf/watt graphs when Huang tests them out in a couple of weeks.

The disappointing part would be Skymomt beating Zen4/RPC at low power level 🤣

511 · Aug 10, 2024

SiliconFly said:
Had some free time. It's 9.383%

Its 9.69% everything else is wrong 🙂

poke01 · Aug 10, 2024

https://twitter.com/x/status/1812262772136448059

https://twitter.com/x/status/1821902066966561135

PTL is mobile only.

Philste · Aug 10, 2024

These PLs are wild. ARL looks bad but a the same time PTL-H is only 64W PL2 with 16 Cores and 1536 ALU iGPU. I mean MTL-U has 57W PL2 being a 2+8 with 512 ALUs.

OriAr · Aug 10, 2024

Intel reportedly planning 8-core Core Ultra 3 205/215 Arrow Lake desktop processors - VideoCardz.com

Intel Core Ultra 3 in Arrow Lake desktop Only 8 cores. We have an update on the Arrow Lake desktop series from OneRaichu. The previous report didn’t include any details about low-end processors within the Core Ultra 3 tier, suggesting only Core Ultra 5, 7, and 9 were expected. However, it...

videocardz.com

A 4P+4E Core Ultra 3 would be amazing value for the sub $150 market while demolishing anything AMD has to offer in that price range.
Should offer a big MT performance boost over previous gen as well, and gaming performance will be more than good enough for that price range.

DavidC1 · Aug 10, 2024

Another Intel mistake. Cancelling hybrid Falcon Shores.

AMD on MI300 announced that it's the fastest product to reach $1 billion in revenue. In this dire time, $1 billion could have been a boon to Intel. I doubt it's just "AIeee" why companies are snapping up MI300. Combined high performance CPU/GPU has many other uses and it's a unique product.

Along the way of "saving" money Intel will inevitably make more long term mistakes. Sure, maybe when all 110K employees are gone and the company goes down they'll save $20 billion per year!

Hitman928 said:
Thanks for the link, there’s too many products now, can’t keep up with them all. Has the 500 W for Turin been confirmed? I haven’t seen it in any of the AMD stuff.

https://cdn.wccftech.com/wp-content/uploads/2024/03/AMD-5th-Gen-EPYC-Turin-Zen-5-Zen-5C-CPU-Family-Up-To-160-Cores.jpeg

EPYC Turin ofrecerá entre 128 núcleos y 192 núcleos

Se está filtrando una hoja de ruta y unas especificaciones sobre los futuros AMD EPYC Turin, Turin-X, Turin Dense, Turin AI y mas.

www.profesionalreview.com

The 192 core Turin Dense and 128 core Turin are both 500W.

DavidC1 · Aug 10, 2024

Philste said:
Explain to me what PL2 has to do with battery life...
Does it mean Panther Lake can POTENTIALLY use more power than Lunar Lake? Yes!
Does it mean it WILL use more power than Lunar Lake? No!

Of course you are absolutely right. But take that into account with other factors.

-Pantherlake has one more tile, separating the GPU tile.
-Does it have the System Level Cache?
-What about the power optimized LPDDR PHY?
-Lunarlake will achieve fantastic battery life with just two core types. Why does Pantherlake add LPe again?

Look how the LPE core uses more power at the same frequency than the regular E core. Not by a small amount either. E core is using about 3W and the LPE is using more than 5W.

According to the above graph, they could have just skipped the LPE core and let the regular E core cluster handle it and it would have actually saved quite a bit of power. This is in fact what Lunarlake does. In LNL presentations sometimes it seems they attribute power savings entirely to the Skymont cluster.

Everytime you are jumping to another cluster you have delays in making the previous core sleep and waking up the new one. Having three means more delays, and more delays mean less opportunity for power savings.

TESKATLIPOKA · Aug 10, 2024

Philste said:
These PLs are wild. ARL looks bad but a the same time PTL-H is only 64W PL2 with 16 Cores and 1536 ALU iGPU. I mean MTL-U has 57W PL2 being a 2+8 with 512 ALUs.

Hopefully It won't have a third core type like ARL-H in the SoC tile.
BTW, MTL-U is 2P+8E+2LPE.

DavidC1 · Aug 10, 2024

TESKATLIPOKA said:
Hopefully It won't have a third core type like ARL-H in the SoC tile.
BTW, MTL-U is 2P+8E+2LPE.

Pantherlake does have the LPE core again. I'm not sure if it's with other cores or in the PCD.

It has three active tiles: GPU, Compute/NPU, PCD or Platform Controller Die. It has two additional tiles but they are passive and for structural support.

I think the problem they have with MTL's LPE core not working to save power isn't just the slowness of it. Since you need to hand the state of the machine from one core type to the other and it has to happen very, very fast(milliseconds), there will be a point when both of the tiles have to be active. If that period is too long you aren't saving power.

Also you are adding redundant circuitry, because if you are turning one tile off entirely you have to have two of them. I think they mentioned that regarding media in the MTL presentation.

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