Question AM5: number of PCIE lanes question

mikeymikec · Sep 2, 2024

PCIE lane counts / utilisation is something that I don't think I've ever been fully confident in my understanding of.

Let's take my board and CPU as an example: AMD 7800X3D, ASUS TUF GAMING B650

According to AMD:

https://www.amd.com/en/products/processors/desktops/ryzen/7000-series/amd-ryzen-7-7800x3d.html

PCIE version 5, 24 lanes available to use from the CPU.

Am I correct in thinking that say with a PCIE5 GPU therefore 16 of those lanes are allocated to graphics, 4 lanes are allocated to the 'cpu connected' PCIE5 M.2, leaving 4 for other stuff (what other stuff specifically)? What happens re PCIE lane availability if one has a PCIE4 GPU and PCIE4 M.2 in those slots?

- edit - Apparently the board cannot handle a PCIE5 GPU, PCIE4 max.

That page also says that with the B650 chipset then there's 8 PCIE4 lanes being managed by the chipset, which includes the other two M.2 slots on the board, and I assume also includes SATA and at least some USB ports?

It just seems at a glance that despite the fact that my system is far from 'fully loaded' (ie. every slot and socket is used), with some plausible changes it could easily become starved of PCIE bandwidth? Right now my system spec is as follows:

AMD 7800X3D
32GB DDR5-6000 (two modules)
6700XT in first PCIE16 slot
Samsung 980 PRO in first M.2 slot (Win11 install)
Samsung 970 Evo Plus in second M.2 slot (Linux install)
4TB HDD SATA
2x SATA optical drives
A bunch of USB devices, but nothing terribly bandwidth consuming as a general rule, very occasionally a USB NVMe enclosure will be connected.

One thought I'd had is to utilise the third M.2 slot. The board manual says that I can either use PCIEX16_2 or the third M.2 slot.

Tech Junky · Sep 2, 2024

It's not going to be starved. The chipset is limited to x4 even with two M2's.

In2Photos · Sep 2, 2024

I have one GPU pcie x16 and 3 m.2 drives in an MSI b650 edge with a 7700. In real world use I can't see any performance drop. I don't believe I've run any synthetic benchmarks on the drives either because I don't feel the need. Unless you are hitting all the devices at the same time and for extended periods I just don't see how you would saturate the pcie lanes.

kschendel · Sep 4, 2024

The CPU presents 28 lanes of PCIe 5.0. Four of those lanes always goes to the chipset; current chipsets only run those lanes at PCIe 4.0, and apparently there are no plans for a PCIe 5.0 chipset at present.

So all of the chipset output lanes are PCIe 4.0 or lower. The fancier chipsets have more available output lanes (as well as more USB and more SATA), but it all goes through that x4 PCIe 4.0 link to the CPU. The expectation, which is usually pretty accurate, is that a machine that's loaded up with I/O doesn't necessarily have many of the devices actively transferring data simultaneously.

(Note, I suppose that there's nothing preventing the chipset from presenting a PCIe 5.0 slot, but it can't run at 5.0 speeds for any nontrivial amount of data, so I don't see why it would do that.)

As for the other 24 lanes of PCIe 5.0 from the CPU, it's somewhat up to the board as to how they are used. It appears that most boards above the low end use 4 of those lanes for a PCIe 5.0 m.2 slot. The rest can be allocated to an x16 PCIe slot, or two x8 PCIe slots, or one x8 PCIe slot and up to two x4 m.2 slots. I don't see any real consistency linking slot allocation and motherboard type (i.e. B650, X670, etc) except that I don't think any of the A620 boards supply any PCIe 5.0. (I did not exhaustively check and might be wrong.)

If a PCIe 4 device is in a PCIe 5 capable slot, that specific slot drops to PCIe 4.0. I don't believe that any other slots are affected as a side effect.

mv2devnull · Sep 6, 2024

kschendel said:
As for the other 24 lanes of PCIe 5.0 from the CPU, it's somewhat up to the board as to how they are used. It appears that most boards above the low end use 4 of those lanes for a PCIe 5.0 m.2 slot. The rest can be allocated to an x16 PCIe slot, or two x8 PCIe slots, or one x8 PCIe slot and up to two x4 m.2 slots. I don't see any real consistency linking slot allocation and motherboard type (i.e. B650, X670, etc) except that I don't think any of the A620 boards supply any PCIe 5.0. (I did not exhaustively check and might be wrong.)

16+4 = 20 < 24. Your example does miss 4 lanes.

mikeymikec said:
Let's take my board and CPU as an example: AMD 7800X3D, ASUS TUF GAMING B650

There seem to be two "TUF Gaming B650": "B650-PLUS" and "B650-PLUS WIFI" . Both list:
x16 4.0 expansion slot
x4 5.0 M.2 slot
x4 4.0 M.2 slot
from 7000-series CPU. That adds up to the 24 PCIe lanes.

The chipset of those boards seem to offer 10 PCIe lanes (4x M.2, 4x expansion, and two 1x expansion). However,
> "M.2_3 shares bandwidth with PCIEX16_2. PCIEX16_2 will be suspended once M.2_3 is populated"
reveals that it is only 6 simultaneous lanes, either
4x expansion and two 1x expansion
or
4x M.2 and two 1x expansion. Thus you have to choose between M.2 device on the third slot or PCIe card on the second "16x" slot. You did not list such cards.

lopri · Oct 16, 2024

You gotta look at the block diagram to see what is really going on under the hood. Like this one.

Question AM5: number of PCIE lanes question

mikeymikec

Lifer

Tech Junky

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In2Photos

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kschendel

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mv2devnull

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lopri

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