- Mar 3, 2017
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I ninja edited my post.
No one is testing that because no one with a 2 CCD part cares. What they want are higher numbers...I hope people compare power draw before/after on benchmarks that show improvement. The increased latency might have been due to power savings (whether intentional or not) so improving the latency may cost power. Maybe not enough to matter, but it would still be good for someone to check that instead of just running benchmarks and saying wowww higherrr numberzzzz!
No one is testing that because no one with a 2 CCD part cares. What they want are higher numbers...
Yes, I saw you already deemed any peculiar results invalid as they were posted, so I won't press any further.All the examples I saw in this thread, when you looked closer, showed the same regression with the 7950x versus the 7700x.
Yes, I saw you already deemed any peculiar results invalid as they were posted, so I won't press any further.
If any of these outlets that primarily do real application benchmarking re-benchmark, I look forward to seeing how the results change for the 9900X and 9950X.
Even if AGESA 1.2.0.2 shows the scaling to 9950X corrected for these workloads, there is no way to credit it to the reduced latency, either. Could be any number of things tweaked, changed, or fixed.Peculiar results are fine, but it needs to actually show the latency is the problem. The results I dismissed had no consistency in there being a cross-CCD penalty. For example, results where the 9900x performed just fine while the 9950x struggled. That, to me, means it's not the cross-CCD latency causing the weird performance issue, otherwise how could the 9900x be significantly outperforming the 9950x? You would need results where the 9950x under performs (and the 9900x, if tested, doesn't) compared to the 7950x. It's not an easy thing to show without trying to test for it, but so far, there hasn't really been any results that seem to be showing an issue with the additional latency, which may not have even existed in real work loads.
There it is. There is an idle power consumption graph, shown below, but its only a few watts different from 7000 series.TPU tests ST power numbers. Maybe they'll do updated testing, but I doubt it. Their graph is why I figured it was a power saving feature to begin with:
Yeah, Im familiar with that, but that is not AMD saying they will fix it. Thats a rumor from some unknown Asian person on X.
WOW!
After hearing rumors about newest beta agesa 1.2.0.2 improving both performance and latency i decided to put it to the test!
I downloaded and flashed to newest ASUS bios 2401 and ran capframeX core-to-core latency
And wow indeed, the wispers were true, with agesa 1.2.0.2 AMD have finally fixed the core-to-core latency plaguing the 9000 from launch
This is with agesa 1.2.0.1A bios 2303 = cross CCD latency is ~180ns
View attachment 107682
Now with agesa 1.2.0.2 bios 2401 = cross CCD latency is ~75ns
View attachment 107683
Otherwise 100% same settings used for both runs, will be interesting to see how this affect the gaming performance / latency bound benchmarks
+40% IPC is achievable after all!!!!
PBO x20
disable SMT
disable windows security mitigations
windows kernel patches
fix parking behaviour
microcode updates
dual decoder fix
🙏 pray to Lisa Su morning, noon, afternoon, evening and in your sleep 🙏
The cope is real anyway feels like consumers were beta testers 🤣+40% IPC is achievable after all!!!!
PBO x20
disable SMT
disable windows security mitigations
windows kernel patches
fix parking behaviour
microcode updates
dual decoder fix
🙏 pray to Lisa Su morning, noon, afternoon, evening and in your sleep 🙏
Like i wrote 1 page back, i hope/think Zen5 will get re-benched when X870E launches at the end of this month.Well done to AMD for addressing the inter-CCD latency penalty. It would be nice if everyone could go back and rebenchmark Zen5 after all these OS updates and AGESA tweaks.
As soon as the Windows Update 24H2 has been rolled out and the motherboard manufacturers have officially incorporated the latest AGESA updates into their BIOS versions, we will test all Ryzen processors again. This should mean we are well prepared for Arrow Lake.
There are games (like CA engine games (Total War, Warhammer etc)) that utilize all cores, and there was a significant regression there according to the last AT tests (rip). Maybe someone can do the comparison and see if this update fixes abysmal fps in that benchmarkGames should have stayed on one CCD, if everything else was working right.
interestingly they get higher absolute values. I guess you are using a tuned sample with higher IF clock? Or maybe different test frameworks.Hardwarelux also found the same as me
CCD zu CCD: AGESA-Update reduziert Kernlatenzen deutlich - Hardwareluxx
CCD zu CCD: AGESA-Update reduziert Kernlatenzen deutlich.www.hardwareluxx.de
There are other outlets where 7950x vs 9950x score the same in Total War Warhammer III in launch day reviews.There are games (like CA engine games (Total War, Warhammer etc)) that utilize all cores, and there was a significant regression there according to the last AT tests (rip). Maybe someone can do the comparison and see if this update fixes abysmal fps in that benchmark
@Det0x I can't find the screenshots where you displayed the effects of interccd latency. What tool did you use ? or what post number was it that showed these ? I want to test mine. I went back several pages and could not find it.
Maybe I was thinking of a different picture. But thanks for that. I will try capframex.Page 814 - Discussion - Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)
Page 814 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.forums.anandtech.com
I think this is what you were looking for good sir!
Probably they were testing it in a 100% gpu bound scenario (aka if you don't set grass to extreme, for example)There are other outlets where 7950x vs 9950x score the same in Total War Warhammer III in launch day reviews.