Discussion RDNA4 + CDNA3 Architectures Thread

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DisEnchantment

Golden Member
Mar 3, 2017
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With the GFX940 patches in full swing since first week of March, it is looking like MI300 is not far in the distant future!
Usually AMD takes around 3Qs to get the support in LLVM and amdgpu. Lately, since RDNA2 the window they push to add support for new devices is much reduced to prevent leaks.
But looking at the flurry of code in LLVM, it is a lot of commits. Maybe because US Govt is starting to prepare the SW environment for El Capitan (Maybe to avoid slow bring up situation like Frontier for example)

See here for the GFX940 specific commits
Or Phoronix

There is a lot more if you know whom to follow in LLVM review chains (before getting merged to github), but I am not going to link AMD employees.

I am starting to think MI300 will launch around the same time like Hopper probably only a couple of months later!
Although I believe Hopper had problems not having a host CPU capable of doing PCIe 5 in the very near future therefore it might have gotten pushed back a bit until SPR and Genoa arrives later in 2022.
If PVC slips again I believe MI300 could launch before it

This is nuts, MI100/200/300 cadence is impressive.



Previous thread on CDNA2 and RDNA3 here

 
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ToTTenTranz

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Feb 4, 2021
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It's not an NPU why do people keep repeating this?
I think the folks at Digital Foundry have been insisting on the dedicated NPU for a while now.


It's Int8 WMMA running on the GPU. A 300 TOPs NPU would be almost 200mm² by itself.

I don't get how they're reaching 300 TOPs at the 2.21GHz clocks, though.

Even if they're using UINT4 to reach maximum throughput, RDNA3's WMMA should do 1024 operations per compute unit per clock.
On the PS5 Pro's 60 CUs at 2.21GHz that would mean 1024 * 60 * 2.21 = 136 TOPs.


So, either I'm doing some math wrong, or the 300 TOPs number is wrong, or RDNA4's WMMA is bringing a significant boost in tensor operations per clock per CU.
 
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Kepler_L2

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Sep 6, 2020
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I think the folks at Digital Foundry have been insisting on the dedicated NPU for a while now.




I don't get how they're reaching 300 TOPs at the 2.21GHz clocks, though.

Even if they're using UINT4 to reach maximum throughput, RDNA3's WMMA should do 1024 operations per compute unit per clock.
On the PS5 Pro's 60 CUs at 2.21GHz that would mean 1024 * 60 * 2.21 = 136 TOPs.


So, either I'm doing some math wrong, or the 300 TOPs number is wrong, or RDNA4's WMMA is bringing a significant boost in tensor operations per clock per CU.
It's not RDNA3's WMMA engine but RDNA4's, which doubles rates per cycle and adds sparsity on top of that. That's how you get to 300 (well 288 actually) TOPs.
 

ToTTenTranz

Member
Feb 4, 2021
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also they didnt double memory bandwidth so what would be the point of dedicated hardware.

NV SM's are sized exactly because of this reason , the tensor cores will consume 100% of the bandwidth if active 100% of the time.
This was my thought when the Digital Foundry guys started mentioning a dedicated block.


The Xilinx block in AMD's SoCs is there mostly to perform tensor operations at a lower power consumption, so that the iGPU doesn't light up pushing 25W while editing a document in Office with LLM-based Copilot.

300 TOPs UINT8 would be massive and would probably push for the full 576GB/s on the PS5 Pro, let alone having that + 36 TFLOPs GPU + 8-core Zen2 as clients for the memory controller, all at the same time.
 
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del42sa

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May 28, 2013
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del42sa

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May 28, 2013
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Source: MLID. So the article is an utter garbage.
well it's actually the opposite, MLID was the only one who claimed that AMD will release RDNA4 this year, while all other sources pointed to next year. Therefore, if the MLID mentions next year (for whatever reason) it is a confirmation that the release will not happen until next year
 

coercitiv

Diamond Member
Jan 24, 2014
6,761
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well it's actually the opposite, MLID was the only one who claimed that AMD will release RDNA4 this year, while all other sources pointed to next year. Therefore, if the MLID mentions next year (for whatever reason) it is a confirmation that the release will not happen until next year
Excellent display of the logical fallacy "two wrongs make a right".
 

marees

Senior member
Apr 28, 2024
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MLID claims it is delayed because it didn't meet his timeline.

Meanwhile I've been saying CES for months. It seems my source needs fewer corrections than his source(s). And I don't even have a source.
Kyle Bennett from hardocp insisted right after an early quarterly results (where for the first time console sales started to tank & Lisa gave further bad guidance for rest of 2024) that we won't see stock on shelves until 2025

This was confirmed officially by power color rep in computex & unofficially by other board partners in same event
 
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Mopetar

Diamond Member
Jan 31, 2011
8,149
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Can anyone tell me if AMD's BS fake frame bars are as big as NVidia's BA fake frame bars? I'm a cretinous pillock easily impressed by gimmicks and am glad that now that AMD is a software company they can focus on delivering the kind of thing that gamers really want. I just want to know if they're delivering that experience better than Nvidia. Okay, I actually just want to know if it's close enough to make Nvidia lower their prices.

/s
 
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