Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

Henry swagger · Oct 3, 2024

FlameTail said:
View attachment 108590
Integer performance of Lion Cove seems really strong.

After watching Geekerwan'a review, I am overall very impressed by Lunar Lake. It even beats the X Elite!
View attachment 108591
SPEC2017 INT
View attachment 108592
Battery Life test

Impressive stuff

Henry swagger · Oct 3, 2024

SiliconFly said:
It appears the comparison actually isn't apples-to-apples cos LNC P core numbers include the massive L2 whether the Apple M3 numbers don't. Thats not right.

@DavidC1, @Hitman928, @AMDK11, @511 or any of you can please figure out the actual size of Lion Cove P core in LNL without L2? This would make the comparison more meaningful.

Edit: My bad. Got it from @DavidC1's post. Thank you!

So, now the numbers are in & both are on N3B & w/o L2:

Lion Cove P core is ~3.43 mm2
Apple M3 P core is ~2.49 mm2.

This makes Lion Cove a massive ~37% bigger but still less performant than M3! This is truly mind-numbing. Why is the P core so fat? Like some sort of fetish. Yikes. Somebody please fire the P core team asap!

Yeah intel p cores need a diet.. nearly 40% bigger than apple on the same node

FlameTail · Oct 3, 2024

SiliconFly said:
It appears the comparison actually isn't apples-to-apples cos LNC P core numbers include the massive L2 whether the Apple M3 numbers don't. Thats not right.

@DavidC1, @Hitman928, @AMDK11, @511 or any of you can please figure out the actual size of Lion Cove P core in LNL without L2? This would make the comparison more meaningful.

Edit: My bad. Got it from @DavidC1's post. Thank you!

So, now the numbers are in & both are on N3B & w/o L2:

Lion Cove P core is ~3.43 mm2
Apple M3 P core is ~2.49 mm2.

It certainly makes for a hot discussion as to what caches should be included into "core area".

The thing is that Apple has only a 2-level cache hierarchy, whereas Intel has a 4-level cache hierarchy.

M3-P core
192 KB L1i / 128 KB L1d
16 MB sL2

Lion Cove (Lunar Lake)
48 KB L0d
192 KB L1i / 128 KB L1d
2.5 MB L2
12 MB sL3

AMDK11 · Oct 3, 2024

LionCove (LunarLake)
L1-I 64KB
L0-D 48KB
L1-D 192KB
L2 2.5MB
L3 3 MB/core (12MB 4 Core)

The Hardcard · Oct 3, 2024

DavidC1 said:
Lion Cove is on N3B process, which affords at least 30% density advantage over N4, thus Zen 5 on N3B would end up being 3.2mm2, making Lion Cove almost 50% larger.

Yes, but it has much more cache. I am arguing that cache isn’t bloat. I think it’s valid to include the private cache in the core measurements, but it needs to be taken into account when assessing which design is more area efficient.

Bloat would be about the logic area, which is much closer than flat area calculations that include megabytes of cache others aren’t using.

SiliconFly · Oct 3, 2024

The Hardcard said:
Yes, but it has much more cache. I am arguing that cache isn’t bloat. I think it’s valid to include the private cache in the core measurements, but it needs to be taken into account when assessing which design is more area efficient.

Bloat would be about the logic area, which is much closer than flat area calculations that include megabytes of cache others aren’t using.

However we look at it, LNC is:

1. Fatter
2. Less performant
3. Less efficient

… compred to Apple M series P core. It’s just horrible. The P core team should hang themselves considering they’ve been doing this for many decades & Apple M silicon is less than 5 years old. Total messed up. Time to fire these idiots.

Your post offended pretty much everyone. Stating people should commit suicide is beyond distasteful, no matter how hyperbolic it was intended to be.

Mod DAPUNISHER

cannedlake240 · Oct 3, 2024

SiliconFly said:
However we look at it, LNC is:

1. Fatter
2. Less performant
3. Less efficient

… compred to Apple M series P core. It’s just horrible. The P core team should hang themselves considering they’ve been doing this for many decades & Apple M silicon is less than 5 years old. Total messed up. Time to fire these idiots.

Apples been dominating ST perf/W since 2012 starting with A7 soc. They're in a league of their own

poke01 · Oct 3, 2024

SiliconFly said:
However we look at it, LNC is:

1. Fatter
2. Less performant
3. Less efficient

… compred to Apple M series P core. It’s just horrible. The P core team should hang themselves considering they’ve been doing this for many decades & Apple M silicon is less than 5 years old. Total messed up. Time to fire these idiots.

That’s a bit harsh, it’s almost never the engineers fault but upper management who fail to see the future.

MarkizSchnitzel · Oct 3, 2024

lucasworais said:
And whats the reason?

Probably he thinks that niche is not big enough for Apple and ANOTHER player, because apple sucks up all the profit from premium segments anyway.

AcrosTinus · Oct 3, 2024

SiliconFly said:
However we look at it, LNC is:

1. Fatter
2. Less performant
3. Less efficient

… compred to Apple M series P core. It’s just horrible. The P core team should hang themselves considering they’ve been doing this for many decades & Apple M silicon is less than 5 years old. Total messed up. Time to fire these idiots.

You lost me there, we don't know the requirements to get high IPC on a x86 ISA vs ARMv9. I lack the education to even make a guess, hence I leave it to the PhDs.
The only thing I know, is that these are the most complex instruments humans can build and that improvements don't come by easy.

511 · Oct 3, 2024

SiliconFly said:
However we look at it, LNC is:

1. Fatter
2. Less performant
3. Less efficient

… compred to Apple M series P core. It’s just horrible. The P core team should hang themselves considering they’ve been doing this for many decades & Apple M silicon is less than 5 years old. Total messed up. Time to fire these idiots.

They could have had the lead except BK messed it up and their 10nm debacle also Apple has something that x86 lacks Flexibility to mold the ISA remove/add feature and build SW around it x86 is the most complex ISA in terms of Licence and design as well.

The Hardcard · Oct 3, 2024

SiliconFly said:
However we look at it, LNC is:

1. Fatter
2. Less performant
3. Less efficient

… compred to Apple M series P core. It’s just horrible. The P core team should hang themselves considering they’ve been doing this for many decades & Apple M silicon is less than 5 years old. Total messed up. Time to fire these idiots.

I agree that Lion Cove is fatter and less efficient.

1 Apple Silicon is more than 5 years old. What is now referred to as Apple’s P core launched in 2013 in the A7. So the design began in the 2007-2008 timeframe.

Also, Apple has employed CPU and GPU architects since the 1980s. They have built extensive models of what they want from transistors. The Altivec extension of the PowerPC G4 was done by Apple CPU architects. So it’s not like they came into the room even in 2007 saying, “So, what do we do?”

2. Gerard Williams III designs are top notch, but his teams have freedoms x86 designers don’t have. They aren’t accountable to customers running software written in the 1980s and 1990s. Apple’s design team is the freeest, they can toss features the company pushed as the new direction developers had to adopt less than a decade earlier.

adroc_thurston · Oct 3, 2024

lucasworais said:
And whats the reason?

Cost.

adroc_thurston · Oct 3, 2024

DavidC1 said:
That's cause Y chips weren't excelling in any areas

Well the original Ivys, no, but things like Broadwell-Y were class-leading for their era.

DavidC1 said:
The Y chips were super slow in both single thread and iGPUs

Frankly, any fat iGP in 10W premium tablet niche is kinda an excess.

DavidC1 said:
The BOM argument is short-sighted.

It's literally the argument that sinks WoA every time. It's also the argument that makes LNL niche.
If you can deliver 85% of that battery life at 20-30% lower cost? hell yeah sign me tf up.

Hitman928 · Oct 3, 2024

DavidC1 said:
You are also missing the point, or maybe you aren't paying attention. Likely AMD has incorrect sensors as two outlets point this out, how the system power is comparable to Intel platform that has the TDP of the SoC set 5W or so higher.

You have a handheld, you are gaming. One has a 22W SoC but 30W system power, for 2 hours of gaming with a 60WHr battery. The other has a 15W SoC but still same 30W system power, for the same 2 hours of gaming with a 60WHr battery.

If Geekerwan or other outlets set the TDP to be same between Intel platforms and AMD platforms, the system power would end up being LESS than the AMD system thus you end up with better battery life.

As a user do you really care about SoC power? Especially when the system power numbers show different than expected?

Apple has way more L1 caches than both vendors. It's the fastest cache so it performs better, and it's the closest so you save power because you are needing to move less.

Lion Cove is on N3B process, which affords at least 30% density advantage over N4, thus Zen 5 on N3B would end up being 3.2mm2, making Lion Cove almost 50% larger.

Other outlets I’ve seen haven’t shown this large discrepancy between sensors and power draw. For instance, when in as close to an identical laptop as possible, STX and MTL systems pull nearly identical wall power when both are set to 28 W limits.

An even more direct measurement of the cables on desktop systems show that the sensors are spot on once factoring in the VRM efficiency. Certainly no less accurate than Intel’s.

I’d need to see much more proof of this AMD sensors are bad theory as we have clear evidence to the contrary. Using different laptops, even with the display off, has too many variables to try and use it to test SoC power/performance at the system level. It’s a silly test. System level power/performance, sure, but it’s going to be individual to the laptop tested.

Edit: Another example in the opposite direction of why drawing SoC conclusions on system power draw is silly,

coercitiv · Oct 3, 2024

Hitman928 said:
Other outlets I’ve seen haven’t shown this large discrepancy between sensors and power draw. For instance, when in as close to an identical laptop as possible, STX and MTL systems pull nearly identical wall power when both are set to 28 W limits.

This only proves Meteor Lake has bad telemetry. /s

adroc_thurston · Oct 3, 2024

Hitman928 said:
Edit: Another example in the opposite direction of why drawing SoC conclusions on system power draw is silly,

Yeah, you can only do system-level comparisons like that in an exact same chassis. Which really isn't the case most of the time.

Asterox · Oct 3, 2024

lopri said:
Plenty of 285K runs

Geekbench Search - Geekbench

Seem comparable to 9950X's scores

Hm GB singlecore for K variant, it is significantly lower even compared to the R7 9700X.This is comparison with non K version. Multi-Core hm, as if the Intel CPU is broken or drunk.

Intel Core Ultra 9 285 Underperforms Against AMD Ryzen 7 9700X in Preliminary Benchmarks

A leaked Geekbench 6 benchmark reveals results for the Intel Core Ultra 9 285 non-K variant, shared by BenchLeaks on platform X, suggest that this CPU may not perform as well as AMD's Ryzen 7 9700X.

www.guru3d.com

Intel Core Ultra 9 285 non-K variant in GB, supposedly it's a 65W TDP version or a test.

AMDK11 · Oct 3, 2024

Up
It was tested with a single 8GB RAM module.

LionCove:
C&C
Test Comment Lion Cove IPC Redwood Cove IPC Zen 5 IPC
XOR r,r Commonly used to zero registers. The exclusive-or of two identical values is always zero 7.31 5.7 5.01
XOR xmm, xmm Same as above but for a vector/FP register 7.31 5.71 4.99
Dependent MOV r,r >1 indicates move elimination 7.02 5.56 6.65
Independent MOV r,r Easy 7.25 5.71 5.01
Dependent increment Actual math, normally would create a dependency chain limiting the test to 1 IPC 5.6 5.53 1
Dependent add immediate As above but adding small numbers up to 20 instead of just 1. 4.36 5.47 1

Category Lion Cove Available Scheduler Entries Zen 5 Available Scheduler Entries
Scalar Integer Math 97 88
Floating Point/Vector Math 114 76
Memory Accesses 62 58

Structure Required if an instruction… Lion Cove Redwood Cove Zen 5
Reorder Buffer (ROB) Exists 576 512 448
Integer Register File Writes to a scalar integer register ~290 280 240
Floating Point/Vector Register File Writes to a floating point/vector register ~406 332 384
Mask Register File Writes to an AVX-512 mask register
Intel CPUs alias MMX/x87 registers to the same physical register file ~166 ~158 ~146
Load Queue Reads from Memory ~189 192 N/A, ~202 measured
Store Queue Writes to Memory 120 114 104
Branch Order Buffer Affects control flow 180 128 96

Nothingness · Oct 3, 2024

FlameTail said:
View attachment 108590
Integer performance of Lion Cove seems really strong.

After watching Geekerwan'a review, I am overall very impressed by Lunar Lake. It even beats the X Elite!
View attachment 108591
SPEC2017 INT
View attachment 108592
Battery Life test

It would be interesting to report SPEC results on battery, and how many times SPEC can be run on a single charge. That'd be unrealistic for many users, but at least we'd get a hint at how fast these machines are doing hard work unplugged (of course 1T might not be pushing them hard enough, but that'd be a first step).

alcoholbob · Oct 3, 2024

Det0x said:
New coolers recommned for Arrow Lake
View attachment 108569

https://videocardz.com/newz/intel-core-ultra-200-lga-1851-cpu-hot-spot-reportedly-a-bit-further-north-than-lga-1700s

Guess Noctua needs to start working on their Intel offset mounting kit as well…

SiliconFly · Oct 3, 2024

alcoholbob said:
Guess Noctua needs to start working on their Intel offset mounting kit as well…

Is ARL-S desktop gonna run hotter than RPL-S? Raptor itself runs real hot while gaming. What kinda of Arrow Lake temperatures are we talking about?

Hulk · Oct 3, 2024

The Hardcard said:
I agree that Lion Cove is fatter and less efficient.

1 Apple Silicon is more than 5 years old. What is now referred to as Apple’s P core launched in 2013 in the A7. So the design began in the 2007-2008 timeframe.

Also, Apple has employed CPU and GPU architects since the 1980s. They have built extensive models of what they want from transistors. The Altivec extension of the PowerPC G4 was done by Apple CPU architects. So it’s not like they came into the room even in 2007 saying, “So, what do we do?”

2. Gerard Williams III designs are top notch, but his teams have freedoms x86 designers don’t have. They aren’t accountable to customers running software written in the 1980s and 1990s. Apple’s design team is the freeest, they can toss features the company pushed as the new direction developers had to adopt less than a decade earlier.

Point #2 has always amazed me. Apple has had what 3 total OS changes? Motorola to Power PC to x86 to whatever what they are on today is called. That's astounding and a big part of the reason they can do it is because they totally control both hardware and software.

This is the reason the PC and Apple can and will continue to coexist. They both serve different markets within the giant computer "tent." Some people, like me, want more control over the PC both from a software and hardware point of view. I want to build exactly what i want, I want to be able to run software I might have from 30 years ago (Quickbooks for example).

Others don't care what is going on in there. They just want to buy it all ready to go and know it works for what they need it for today.

Neither path is a better or worse, just different. Apple has done and continues to do incredible things with technology. The PC world just kind of plods along, generally putting one foot in front of the other.

H433x0n · Oct 3, 2024

SiliconFly said:
Is ARL-S desktop gonna run hotter than RPL-S? Raptor itself runs real hot while gaming. What kinda of Arrow Lake temperatures are we talking about?

It doesn’t run hot while gaming assuming you’re using competent cooling. Look at cooler reviews from hardware canucks or similar YouTube channels and their results will be in the 50-80* C range.

Doug S · Oct 3, 2024

DavidC1 said:
Apple has way more L1 caches than both vendors. It's the fastest cache so it performs better, and it's the closest so you save power because you are needing to move less.

That's not true, at least not based on the Lunar Lake numbers FlameTail listed a few posts earlier - are those not correct?

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Senior member

Attachments

Senior member

Senior member

Diamond Member

Senior member

Senior member

Golden Member

Senior member

Platinum Member

Senior member

Member

Golden Member

Senior member

Diamond Member

Diamond Member

Diamond Member

Diamond Member

Diamond Member

Golden Member

Senior member

Diamond Member

Diamond Member

Golden Member

Diamond Member

Golden Member

Platinum Member