Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

cebri1 · Oct 3, 2024

poke01 said:
There won’t be any major changes to x86 till Nova Lake. So for people that want exciting changes it won’t happen till late 2026.

we are in a slug till in then. Arrow Lake is fine, saves only by Skymont and panther lake won’t have APX. Still the CPU industry is better than ever. Looking at the consumer GPU side of things, it’s no where near as bleak.

Cougar Cove for Laptop. With an expected 5-7% IPC increase it will be a nice bump in efficiency.

DavidC1 · Oct 3, 2024

itsmydamnation said:
this table is meaningless without latencies ,
But if i was to guess on why intel went this structure its again because of TLB lookups / 4k page size. it makes scaling the the first cache level really hard on x86.

Stop reading just the latest posts, we went over this.

M3-P	Lion Cove
L0d		48 KB - 4 cycles
L1d	128 KB - 3 to 4 cycles	192 KB - 9 cycles
L1i	192 KB - 3 to 4 cycles	64 KB - 5 cycles
L2	16 MB (shared) - 18 cycles	2.5 MB (private) - 17 cycles
L3		12 MB - 51 cycles (shared)

Apple pummels competition in all areas, power efficiency, performance per clock, ability to clock.

DavidC1 · Oct 3, 2024

Deleted

AMDK11 · Oct 3, 2024

Skymont: Intel’s E-Cores reach for the Sky

The 2020s were a fun time for Intel’s Atom line, which went from an afterthought to playing a major role across Intel’s high performance client offerings.

chipsandcheese.com

Doug S · Oct 3, 2024

DavidC1 said:
Stop reading just the latest posts, we went over this.

M3-P Lion Cove
L0d 48 KB - 4 cycles
L1d 128 KB - 3 to 4 cycles 192 KB - 9 cycles
L1i 192 KB - 3 to 4 cycles 64 KB - 5 cycles
L2 16 MB (shared) - 18 cycles 2.5 MB (private) - 17 cycles
L3 12 MB - 51 cycles
(shared)

Apple pummels competition in all areas, power efficiency, performance per clock, ability to clock.

Part of this is because Apple has a 16K page size while Intel's is 4K, and that's not something they're able to change. That has implication on the design of an L1 cache. I wouldn't give all the credit to Apple's design team. They're good, but no one is good enough to halve the latency of the competition without some wind at their back.

poke01 · Oct 3, 2024

Doug S said:
Part of this is because Apple has a 16K page size while Intel's is 4K, and that's not something they're able to change. That has implication on the design of an L1 cache. I wouldn't give all the credit to Apple's design team. They're good, but no one is good enough to halve the latency of the competition without some wind at their back.

Why 16k page size matters

16k vs 4k page sizes & Asahi Linux.

tristanxr.com

DavidC1 · Oct 3, 2024

poke01 said:
Read more about 16K pages here.

Why 16k page size matters

16k vs 4k page sizes & Asahi Linux.

tristanxr.com

16KB page sizes are also beneficial for NAND SSDs as you don't need as much DRAM for garbage collection duty.

Doug S · Oct 3, 2024

poke01 said:
Read more about 16K pages here.

Why 16k page size matters

16k vs 4k page sizes & Asahi Linux.

tristanxr.com

That article is more talking about software compatibility, rather than the influence on cache or TLB. It also kind of undersells things since it is Linux focused. It would be more of a problem on Windows, though there are some ways to mitigate it. Where it would really burn you there would be drivers.

DavidC1 · Oct 3, 2024

AMDK11 said:
Skymont: Intel’s E-Cores reach for the Sky

Skymont: Intel’s E-Cores reach for the Sky

The 2020s were a fun time for Intel’s Atom line, which went from an afterthought to playing a major role across Intel’s high performance client offerings.

chipsandcheese.com

The MLC cache has 59.5ns of latency, which is similar to Meteorlake's L3 cache latency numbers but that's in cycles, since it's about 59 cycles! It's 3.5x the difference in latency between the two. Some very well tuned desktop RAM can beat MLC cache latency.

This answers what the difference is between MLC caching and an L4. Since ultra fast caches use more power and have higher leakage, it makes sense. DRAM is higher power bit bit, so even if the performance gain isn't as much, it still saves a lot of power.

AMDK11 · Oct 3, 2024

ikjadoon said:
FWIW, AMD has been studying Intel's X86-S proposal, according to this TechPowerUp interview of AMD's David McAfee in July 2023:

Lion (x86) is strong but heavy, while Panther (APX and x86-S?) is light and agile

poke01 · Oct 3, 2024

sorry if I missed this but how is Skymont different in Arrow lake vs Lunar?

In Lunar it’s an LPE core and in Arrow it’s an E core on the ring bus. Is that right?

OneEng2 · Oct 3, 2024

Doug S said:
David Kanter explains it better than I or most anyone else ever could:

https://www.realworldtech.com/transistor-count-flawed-metric/

David is a "g"od with a little "g" . Been enjoying his architecture deep dives for like 30 years I think.

poke01 said:
It’s impossible for Strix point to be lower power than Lunar lake, even next gen Zen6 APU won’t reach Lunar levels if AMD doesn’t follow the design of Lunar.

Love that word "impossible".

It will be interesting to see how Arrow Lake laptop versions perform compared to Zen 5. I believe that thin-and-light is a much smaller segment 30-40% vs 60-70%. I do agree that Lunar Lake appears to be a pretty good processor for its designed market. My only thought is that AMD is competing with Intel from a less expensive, lower transistor density, more power hungry process node. Will Intel be able to turn Lunar Lake into profit, or will they have to continue to bleed cash to keep market share?

Tough calculation to make from a forum .

DavidC1 · Oct 3, 2024

poke01 said:
sorry if I missed this but how is Skymont different in Arrow lake vs Lunar?

In Lunar it’s an LPE core and in Arrow it’s an E core on the ring bus. Is that right?

Yes, and in Arrowlake it'll be able to share the much faster L3 cache with the Lion Cove P core. I assume it'll lose a lot of efficiency and be an area efficient performance increase in Arrow.

itsmydamnation · Oct 3, 2024

DavidC1 said:
Stop reading just the latest posts, we went over this.

M3-P Lion Cove
L0d 48 KB - 4 cycles
L1d 128 KB - 3 to 4 cycles 192 KB - 9 cycles
L1i 192 KB - 3 to 4 cycles 64 KB - 5 cycles
L2 16 MB (shared) - 18 cycles 2.5 MB (private) - 17 cycles
L3 12 MB - 51 cycles
(shared)

Apple pummels competition in all areas, power efficiency, performance per clock, ability to clock.

ill try harder to please you next time .

but really that was exactly the point ,

the L0D is really just a typical L1D ,
the L1D a smallish L2D (old school) with typical small L2 latency
the L2 a current typical L2
and L3 is still very intel L3.

would be interesting if they did something like vector load/store into the L1d and scalar only in the L0d.

Wolverine2349 · Oct 3, 2024

Doug S said:
That's probably why Intel started talking about "X86-S", which would be a 64 bit only version of x86 that cuts out legacy cruft like segmentation, rings 1 & 2, 16 bit addressing, and some obsolete I/O related features. That doesn't address issues with variable length instructions with all the prefixes, but it would mark the first time Intel produced an x86 CPU that wasn't capable of running as an 8086.

Has every CPU intel produced to date been capable of natively running as an 8086?

Is Arrow Lake gonna change that.

I mean there is no real reason and has not been for a long while to have 16 bit x86 stuff.

32 bit is natively still needed and will be for a long while yet.

Hulk · Oct 3, 2024

DavidC1 said:
Stop reading just the latest posts, we went over this.

M3-P Lion Cove
L0d 48 KB - 4 cycles
L1d 128 KB - 3 to 4 cycles 192 KB - 9 cycles
L1i 192 KB - 3 to 4 cycles 64 KB - 5 cycles
L2 16 MB (shared) - 18 cycles 2.5 MB (private) - 17 cycles
L3 12 MB - 51 cycles
(shared)

Apple pummels competition in all areas, power efficiency, performance per clock, ability to clock.

Yes, and the BIG question is why don't we put these discussion to rest and just buy an Apple right?!

poke01 · Oct 3, 2024

Hulk said:
Yes, and the BIG question is why don't we put these discussion to rest and just buy an Apple right?!

lol these are just theoretical discussions, most here would would never buy a Mac desktop or an expensive MacBook. My respect with Apple ends with their SoC/CPU design team. I don’t like their business practices and how they treat customers poorly.

x86 is important for a lot of us because of software and so is upgradability and cost. At most the comparisons with Apple represent where x86 needs to catch up.

Intel already caught up to or even beat Apple in idle power consumption. The next step is IPC and core size optimisation.

we need non-x86 competition to make Intel improve and it’s for our benefit.

H433x0n · Oct 3, 2024

OneEng2 said:
David is a "g"od with a little "g" . Been enjoying his architecture deep dives for like 30 years I think.

Love that word "impossible".

It will be interesting to see how Arrow Lake laptop versions perform compared to Zen 5. I believe that thin-and-light is a much smaller segment 30-40% vs 60-70%. I do agree that Lunar Lake appears to be a pretty good processor for its designed market. My only thought is that AMD is competing with Intel from a less expensive, lower transistor density, more power hungry process node. Will Intel be able to turn Lunar Lake into profit, or will they have to continue to bleed cash to keep market share?

Tough calculation to make from a forum .

Since when is a 232mm2 die on N4P cheap?

511 · Oct 3, 2024

ARLs Cost of the entire die will not be much higher than Strix Point about. 96mm2 SOC is unchanged N6 IO die has some tweaks GPU is switched to N4P with XMX and CPU N3B we can simply take clusters and compute the size for ARL-H CPU die from LNC to get approx

Hitman928 · Oct 3, 2024

9949asd said:
You know the geekwan test is using board power(excluding screen) limited to 30w right?

258v on board devices use 8w
370 on board devices use 15w
185h on board devices use 8w

So, why there is a 7w difference on the board? The all have ram and m2.

Also the battery life test will not lieView attachment 108642

The sensors type or location on intel and amd chip for sure will be different, even lunar lake and MTL will be different. The software reading is not guarantee correct. that’s why they use system power or board power.

What I’m saying is, other reviewers that try to eliminate as many variables as possible, one by using the same model laptop and one by bypassing the entire system except the VRM’s and measuring the power directly, don’t show this discrepancy. Trying to compare SOC power with system level measurements of different systems is futile and completely insufficient to show that AMD’s sensors are wildly inaccurate, especially when other reviewers don’t show the same with better control.

DavidC1 · Oct 3, 2024

poke01 said:
we need non-x86 competition to make Intel improve and it’s for our benefit.

I'll never buy Apple either, but I respect what they got out with their SoC. Lunarlake would never exist without Apple threat. I remember a magazine where it talked about Apple iPod batteries only lasting 18 months but couldn't be replaced.

One guy got pissed off so much that he went around all the Apple stores in his city and put up a sign "Apple iPod battery only last 18 months, and they don't give service nor allow you to replace them". Few months later they said they'll offer service. Not a coincidence I bet. You'll see Louis Rossman basically spearheading that all manufacturers embrace Right to Repair, and he's owns an Apple repair shop.

It's because I don't like the Apple ecosystem too much that I wished the x86 vendors would do much better.

Hitman928 said:
Trying to compare SOC power with system level measurements of different systems is futile and completely insufficient to show that AMD’s sensors are wildly inaccurate, especially when other reviewers don’t show the same with better control.

I can believe both actually. The AMD GPUs didn't fully measure board power either. I've also seen user results with their notebooks where the power results are off. One thing Intel is pretty damn good is giving documentation and support. So for some reason some systems aren't able to measure accurately.

Now who out there is willing to buy two very different Strix laptops to test it out? Who else is willing to do that for Lunarlake? Anandtech is a fail, but the forum is still lively. Why not let that spirit live here? Like a user review.

@itsmydamnation I don't care for that. I know you can readily search for it as I do, and I bother reading at least few pages back.

Hitman928 · Oct 3, 2024

DavidC1 said:
I'll never buy Apple either, but I respect what they got out with their SoC. Lunarlake would never exist without Apple threat. I remember a magazine where it talked about Apple iPod batteries only lasting 18 months but couldn't be replaced.

One guy got pissed off so much that he went around all the Apple stores in his city and put up a sign "Apple iPod battery only last 18 months, and they don't give service nor allow you to replace them". Few months later they said they'll offer service. Not a coincidence I bet. You'll see Louis Rossman basically spearheading that all manufacturers embrace Right to Repair, and he's owns an Apple repair shop.

It's because I don't like the Apple ecosystem too much that I wished the x86 vendors would do much better.

I can believe both actually. The AMD GPUs didn't fully measure board power either. I've also seen user results with their notebooks where the power results are off. One thing Intel is pretty damn good is giving documentation and support. So for some reason some systems aren't able to measure accurately.

Now who out there is willing to buy two very different Strix laptops to test it out? Who else is willing to do that for Lunarlake? Anandtech is a fail, but the forum is still lively. Why not let that spirit live here? Like a user review.

AMD isn’t trying to report board power, it’s SOC/SIP power.

The GPU situation was largely due to people not understanding that AMD and NV were reporting different things in software (TGP for AMD). This wasn’t a bad sensor situation but more people thinking AMD was reporting the same thing NV was, but that wasn’t the case and AMD wasn’t including board level losses in their number, nor were they claiming to, but people just assumed they were.

igor_kavinski · Oct 3, 2024

DavidC1 said:
One guy got pissed off so much that he went around all the Apple stores in his city and put up a sign "Apple iPod battery only last 18 months, and they don't give service nor allow you to replace them". Few months later they said they'll offer service. Not a coincidence I bet. You'll see Louis Rossman basically spearheading that all manufacturers embrace Right to Repair, and he's owns an Apple repair shop.

I learned the hard way how much Apple sucks. Got an M1 laptop and $75 in exchange for pawning my 3060 Ti and 3080 10GB. Last time I checked, the laptop wouldn't power on. Misplaced its original charger somewhere. Tried with all other USB-C chargers I had on hand, including one that quick charges my Moto Edge mobile. None of them were able to revive it. That's my first ever laptop purchase where the damn laptop won't even turn on!

dttprofessor · Oct 4, 2024

x86 laptop market: the more light the more expensive.
mac laptop market: the more heavy the more expensive.
which is correct?

511 · Oct 4, 2024

dttprofessor said:
x86 laptop market: the more light the more expensive.
mac laptop market: the more heavy the more expensive.
which is correct?

Sir let me Introduce you to 3-4Kg 14900HX/4090 laptops that you can't carry without breaking your back

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