Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

coercitiv · Oct 9, 2024

gdansk said:
Intel is a long-time customer of TSMC and on the verge of switching most of their volume to TSMC. I think TSMC will negotiate with them fairly as it weaken a future foundry competitor if even Intel won't use Intel Foundry.

The point of departure for the discussion was that consumer Zen 5 is presumably comparable in production cost with ARL. From that point onward I saw multiple attempts to minimize the BOM for ARL, from optimistic die size estimates to very optimistic negotiation results with TSMC.

I was not implying that TSMC would not negotiate fairly, but rather that fair negotiations do not necessarily bring N3B prices for Intel that are equal to N4P prices for AMD. AMD is also a long-time customer to TSMC, with arguably closer relations than Intel. On top of this, as you may see from the article linked above, Intel managed to annoy (if not more) TSMC with their aggressive lobby to US officials. This culminated with Pat Gelsinger having to make a trip to Taiwan. Things were a bit hot.

coercitiv · Oct 9, 2024

H433x0n said:
That's not how TSMC works and even if it was It's in TSMC's best interests to treat Intel well.

I'll repeat this for the sake of clarity: it's one thing to be treated well/fair, another to get equal/better pricing than the competitor on an arguably less cost intensive node. I think we can both agree that in order to seriously consider the latter, we'd need more than speculation, especially when hints from past events and market trends don't seem to support this narrative.

Hitman928 · Oct 9, 2024

coercitiv said:
The point of departure for the discussion was that consumer Zen 5 is presumably comparable in production cost with ARL. From that point onward I saw multiple attempts to minimize the BOM for ARL, from optimistic die size estimates to very optimistic negotiation results with TSMC.

I was not implying that TSMC would not negotiate fairly, but rather that fair negotiations do not necessarily bring N3B prices for Intel that are equal to N4P prices for AMD. AMD is also a long-time customer to TSMC, with arguably closer relations than Intel. On top of this, as you may see from the article linked above, Intel managed to annoy (if not more) TSMC with their aggressive lobby to US officials. This culminated with Pat Gelsinger having to make a trip to Taiwan. Things were a bit hot.

Yes, TSMC's CEO is not fond of Pat Gelsinger.

511 · Oct 9, 2024

Hitman928 said:
I'm not going to argue about the exact price as those are under NDA and specific to high volume contracts anyway. The point was that prices haven't come down, they have and are going up.

We can argue this till eternity prices will go up and down it's in its nature but now they are down comparing to initial N3B and they will increase it soon like they have said

Hitman928 · Oct 9, 2024

511 said:
We can argue this till eternity prices will go up and down it's in its nature but now they are down comparing to initial N3B and they will increase it soon like they have said

I haven't seen any evidence to suggest TSMC has reduced N3B pricing, it has only increased.

511 · Oct 9, 2024

The only thing i find is one raichus quote nodes are expensive when they just come they loose a bit of pricing and than according to the demand price fluctuates am i wrong one raichu agrees with me atleast 🤣
On a sidenote I think many companies will move to custom ASIC in coming years

Hitman928 · Oct 9, 2024

511 said:
The only thing i find is one raichus quote nodes are expensive when they just come they loose a bit of pricing and than according to the demand price fluctuates am i wrong one raichu agrees with me atleast 🤣

He's basing that on historical trends, but those have been broken since the pandemic. The graph I posted on the last page is the current reality.

MoistOintment · Oct 9, 2024

Hitman928 said:
Are you saying N3B is less expensive than prior nodes if the die is smaller? It’s expensive either way. Obviously less die space on the most expensive node is better, but it’s still just as expensive a node, is the biggest part of the SOC (at least for the high end), and you have to deal with the additional advanced packaging costs, including a bigger base tile. There's a reason Intel said that margins will remain low until they can get off of external nodes and transition to 18a.

Intel spoke of the MoP for LNL being the biggest hit to their margins, as they have to include that memory at cost

MoistOintment · Oct 9, 2024

Arguing BoM of Zen 5 vs ARL is pointless without talking specifics. Until you give hard numbers on costs and margins, it's all hearsay.

A 9950X uses 141mm^2 of N4P for its CCDs.
Someone else here is claiming ARL-S 8+16's compute tile is 88mm^2 of N3B.

N4P is what, $20K per wafer?

N3B is not 46% more expensive than N4P, so if these die sizes are true, then we at least know that ARL's compute tile is cheaper than Zen 5's dual CCDs.

Someone else can do the math on packaging and the cost structure of the remaining tiles, but I'm really not seeing any evidence that ARL is "substantially" more expensive to produce.

Hitman928 · Oct 9, 2024

MoistOintment said:
Intel spoke of the MoP for LNL being the biggest hit to their margins, as they have to include that memory at cost

Yes, and?

MoistOintment said:
Arguing BoM of Zen 5 vs ARL is pointless without talking specifics. Until you give hard numbers on costs and margins, it's all hearsay.

A 9950X uses 141mm^2 of N4P for its CCDs.
Someone else here is claiming ARL-S 8+16's compute tile is 88mm^2 of N3B.

N4P is what, $20K per wafer?

N3B is not 46% more expensive than N4P, so if these die sizes are true, then we at least know that ARL's compute tile is cheaper than Zen 5's dual CCDs.

Someone else can do the math on packaging and the cost structure of the remaining tiles, but I'm really not seeing any evidence that ARL is "substantially" more expensive to produce.

N4P should be cheaper than that.

N3B is not 46% more expensive, but AMD only has the ~120 mm2 IOD on N6 after the CCDs and cheap packaging. Intel has multiple other tiles (most small outside of the SoC) plus a base tile that has to cover all of the active tiles, and the rest of the advanced packaging costs. The base tile is on a cheap node, but it will still need to be relatively large to cover all of the active tiles. The added cost to assemble it all I can't really comment on as Intel is handling it themselves, but for sure it's going to be significantly more expensive than AMD's costs. Again, exact numbers are unknown, but just look at gross margins and Intel's comments versus AMD's.

Det0x · Oct 9, 2024

I'm excited to insert myself into the socket

let it slide into the gigabyte's snatch

LOL yeah ill stop now 🤣
Seriously tho, how can gigabyte pass this name ?? Dont they check with any englishspeaker what the words means in slang before they name their stuff 🫣

*bonus edit*

How many times do they mention AI in their keynote...?

We need even more AI!

9949asd · Oct 9, 2024

MoistOintment said:
Arguing BoM of Zen 5 vs ARL is pointless without talking specifics. Until you give hard numbers on costs and margins, it's all hearsay.

A 9950X uses 141mm^2 of N4P for its CCDs.
Someone else here is claiming ARL-S 8+16's compute tile is 88mm^2 of N3B.

N4P is what, $20K per wafer?

N3B is not 46% more expensive than N4P, so if these die sizes are true, then we at least know that ARL's compute tile is cheaper than Zen 5's dual CCDs.

Someone else can do the math on packaging and the cost structure of the remaining tiles, but I'm really not seeing any evidence that ARL is "substantially" more expensive to produce.

The price of 285k just leak, $589. I will say ARL is cheaper to make, since the cpu die is really small.
But the gaming performance could be terrible.😢

desrever · Oct 9, 2024

I wonder how bad the launch gaming benchmarks will be, would be funny if they lose to Zen 4 at this point since even the Intel internal numbers are this bad.

gdansk · Oct 9, 2024

desrever said:
I wonder how bad the launch gaming benchmarks will be, would be funny if they lose to Zen 4 at this point since even the Intel internal numbers are this bad.

It really should be better than that.
And a lot of people are ignoring that in certain integer heavy workloads it could still be quite an improvement where disaggregation latency isn't limiting it.

MoistOintment · Oct 9, 2024

Hitman928 said:
Yes, and?

You said: "here's a reason Intel said that margins will remain low until they can get off of external nodes and transition to 18a."
Yes, and Intel stated that the main reason for reduced margins in client was from MoP sold to OEMs at cost, which you didn't mention.

Hitman928 said:
N3B is not 46% more expensive, but AMD only has the ~120 mm2 IOD on N6 after the CCDs and cheap packaging. Intel has multiple other tiles (most small outside of the SoC) plus a base tile that has to cover all of the active tiles, and the rest of the advanced packaging costs. The base tile is on a cheap node, but it will still need to be relatively large to cover all of the active tiles. The added cost to assemble it all I can't really comment on as Intel is handling it themselves, but for sure it's going to be significantly more expensive than AMD's costs. Again, exact numbers are unknown, but just look at gross margins and Intel's comments versus AMD's.

Yes, and what are those costs and die sizes? Looking at MTL-H, their IO and SOC tile combined is also about 120mm^2 of N6. Don't know what ARL's tiles will look like (I imagine no LP-E cores reduces the SoC tile size, but more PCIe lanes increases the IO tile size).

There's of course the GFX tile, which adds additional cost.

Regarding base tile, AMD also has a base tile. The CCDs and SoC aren't freefloating.

Foveros is probably more expensive, but no one can provide me with any cost comparisons.

ARL also has more volume to spread fixed costs across.
But just going by BOM, no-one has provided any satisfactory reasoning or evidence that ARL is more expensive than Zen 5 BOM. I'm not even taking a side in the debate: Just unconvinced by unsubstantiated claims.

Hitman928 · Oct 9, 2024

9949asd said:
The price of 285k just leak, $589. I will say ARL is cheaper to make, since the cpu die is really small.
But the gaming performance could be terrible.😢

Because Product A is sold for cheaper than Product B, therefore Product A is cheaper to make is not sound reasoning.

desrever · Oct 9, 2024

AMD is projecting >50% margins while Intel is expecting much lower. Wonder if the cost of production has something to do with it.

Hitman928 · Oct 9, 2024

MoistOintment said:
You said: "here's a reason Intel said that margins will remain low until they can get off of external nodes and transition to 18a."
Yes, and Intel stated that the main reason for reduced margins in client was from MoP sold to OEMs at cost, which you didn't mention.

ARL doesn't have MoP, that only applies to LNL, so I don't see how that really contradicts my statement which is for all of the TSMC N3B offerings.

MoistOintment said:
Yes, and what are those costs and die sizes? Looking at MTL-H, their IO and SOC tile combined is also about 120mm^2 of N6. Don't know what ARL's tiles will look like (I imagine no LP-E cores reduces the SoC tile size, but more PCIe lanes increases the IO tile size). There's of course the GFX tile, which adds additional cost.

In terms of total silicon, Zen 5 should be more, but on significantly less expensive silicon on average and very cheap package costs.

MoistOintment said:
Regarding base tile, AMD also has a base tile. The CCDs and SoC aren't freefloating.

Where is this base tile supposed to be? Can you show it to me in a picture or diagram?

MoistOintment said:
Foveros is probably more expensive, but no one can provide me with any cost comparisons.

Prices are under NDA, I can only speak in relative terms of cost.

MoistOintment said:
ARL also has more volume to spread fixed costs across.
But just going by BOM, no-one has provided any satisfactory reasoning or evidence that ARL is more expensive than Zen 5 BOM. I'm not even taking a side in the debate: Just unconvinced by unsubstantiated claims.

These are all high enough volume parts that the fixed costs (i.e., mask set) is inconsequential for comparing production costs. Again, you're not going to get an actual cost break down outside of a qualitative cost comparison. The best way to know which costs more is look at what AMD and Intel say their margins are and their commentary around it.

AcrosTinus · Oct 9, 2024

desrever said:
AMD is projecting >50% margins while Intel is expecting much lower. Wonder if the cost of production has something to do with it.

Like I guessed it, the moment Intel goes for the price to compensate for the lack of next generation performance, people start the concern trolling

"the die is going to be expensive"
"how are their margins going to be"
"TSMC is going to squeeze them"
"TSMC might limit their supply"

Out of the consumers view this does not matter, mindshare is all. If they started selling a boatload of them Intel will be happy, margins are not zero they are just below what they are used to, but this is exactly what happens in a competitive market. Once or better if Intel reestablishes themselves, they will be happy to go up the margin hill but now they just need to sell a bunch.

Joe NYC · Oct 9, 2024

This sounds about right:

https://twitter.com/x/status/1844037034094252402

MoistOintment · Oct 9, 2024

Hitman928 said:
but on significantly less expensive silicon

This is the point I'm making right here. What is the price difference. 142mm^2 of N4X is more expensive than ~90 mm^2 of N3B. What's the cost difference between N4X and N3B when equalizing for size?

Prices are under NDA, I can only speak in relative terms of cost.

You know both costs and aren't gonna say? What's the relative cost difference in % if you won't give nominal values?

ARL doesn't have MoP, that only applies to LNL, so I don't see how that really contradicts my statement which is for all of the TSMC N3B offerings.

And? Intel in the earnings call was speaking of general CCG margins including LNL and ARL together, and specifically highlighted MoP as the biggest issue regarding margins this year.

Where is this base tile supposed to be? Can you show it to me in a picture or diagram?

I feel like this is being pedantic. Clearly the CCD's and SoC chiplet are bonded to a package that has the infinity fabric interconnects between the two. That silicon isn't free.

The best way to know which costs more is look at what AMD and Intel say their margins are and their commentary around it.

And those are? AMD's Q2 earnings show 6% operating margin in client., with embedded and datacenter buoying their overall margins. Intel client operating income in the same quarter was showing over 33%, dragged down by poor margins in DCAI and especially foundry. While these figures don't have ARL/LNL, they do have MTL, which should have similar margins to ARL.

gdansk · Oct 9, 2024

AcrosTinus said:
Out of the consumers view this does not matter, mindshare is all. If they started selling a boatload of them Intel will be happy, margins are not zero they are just below what they are used to, but this is exactly what happens in a competitive market

But why would the average gamer/consumer buy the $590 285K instead of the <$500 14.9KK?

MoistOintment · Oct 9, 2024

desrever said:
AMD is projecting >50% margins while Intel is expecting much lower. Wonder if the cost of production has something to do with it.

AMD's margins are much more healthy than Intel because Intel is losing money in foundry and barely breaking even in datacenter.

Client vs Client segment, Intel's operating margin is higher, so we can't draw any conclusions on desktop vs desktop BOM based on overall company's margins.

coercitiv · Oct 9, 2024

Joe NYC said:
This sounds about right:

https://twitter.com/x/status/1844037034094252402

Anyone who pays $800 for a mobo has lost the value game even before the system is assembled. I don't understand this kind of tweets.

GTracing · Oct 9, 2024

MoistOintment said:
I feel like this is being pedantic. Clearly the CCD's and SoC chiplet are bonded to a package that has the infinity fabric interconnects between the two. That silicon isn't free.

The interconnects are on the package substrate. There's no silicon interposer, or base tile, or whatever you want to call it.

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Senior member

Attachments

Diamond Member

Diamond Member

Diamond Member

Golden Member

Diamond Member

Golden Member

Diamond Member

Member

Member

Diamond Member

Golden Member

Member

Senior member

Diamond Member

Member

Diamond Member

Senior member

Diamond Member

Member

Platinum Member

Member

Diamond Member

Member

Diamond Member

Member