Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

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Josh128

Senior member
Oct 14, 2022
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865
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So, we are excited, cause something has changed, but we dont know why and whether the change provides any benefit to us, as the customers? Am i getting that right?
Now that they have lifted the hood on Arrow Lake and we see its just a mildly tuned 4 cylinder, yes. X3D is literally the last hope for this new x86 generation.
 
Reactions: Tlh97 and Joe NYC
Jul 27, 2020
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This could be the last real x86 generation. Nova Lake may feature the proposed x86S and Zen 6 could emulate that in firmware, despite being proper x86 compatible, just so they can pretend that they are entering a new era too.
 

CakeMonster

Golden Member
Nov 22, 2012
1,522
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Well, Z6 could arrive any time from ~18 to ~30 months after Z5 I suppose, so there's at least hope something exciting will happen in not that long (relatively speaking on the short end). I'm in the camp that with everything slowing down, Z6 will use DDR5, not DDR6. Hopefully N3E or whatever it requires will be cheap enough not to delay it more than whatever release window AMD has planned...
 

Mopetar

Diamond Member
Jan 31, 2011
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x86 hasn't been x86 in a long time if you want to look at it that way. Long ago Intel and AMD realized that making a true CISC processor was a nightmare and instead translate the instructions into microcode/micro-ops to simplify the hardware.

x86S just gets rid of some cruft that no one is really using anymore. It's not really entering a new era so much as it is forgetting about some that are no longer relevant or worth supporting. The number of customers who need to run software that old can likely do so just fine on older hardware or aren't even running on x86 in the first place.

If people aren't using some of the legacy instructions in the first place why not ditch them and save transistors on the front-end of the CPU? Particularly considering both Intel and AMD are trying to make wider front-ends that can decode a larger number of instructions.

There are some other reasons to retire part of the ISA outside of this as the older stuff is outside of the duration of any patents and getting everyone to move away from it discourages anyone else from making a CPU compatible with earlier versions of the ISA. Those are probably just nice side effects as opposed to a driving force, but it's still a consideration.
 

inquiss

Senior member
Oct 13, 2010
250
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Well, Z6 could arrive any time from ~18 to ~30 months after Z5 I suppose, so there's at least hope something exciting will happen in not that long (relatively speaking on the short end). I'm in the camp that with everything slowing down, Z6 will use DDR5, not DDR6. Hopefully N3E or whatever it requires will be cheap enough not to delay it more than whatever release window AMD has planned...
It definitely won't use the server-only DDR6...
 

DavidC1

Golden Member
Dec 29, 2023
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If people aren't using some of the legacy instructions in the first place why not ditch them and save transistors on the front-end of the CPU? Particularly considering both Intel and AMD are trying to make wider front-ends that can decode a larger number of instructions.
And are those transistors contributing to power and/or decreasing clocks or efficiency in the cases where they aren't used? Modern processors are far more limited by power not die area.

Or maybe they contribute to design complexity by increasing validation difficulties and time?

If no, then the effects are minimal to negligible.
 

Tuna-Fish

Golden Member
Mar 4, 2011
1,505
2,080
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If people aren't using some of the legacy instructions in the first place why not ditch them and save transistors on the front-end of the CPU? Particularly considering both Intel and AMD are trying to make wider front-ends that can decode a larger number of instructions.

This has no meaningful impact on making decoders easier. The job of decoding an instruction once you have figured out where it starts and have it lined up with a relevant decoder is completely trivial. It could be done in a single cycle in hardware 30 years ago. The entirety of the problem with x86 decode is that it's byte-aligned variable width, with length between 1 and 15. And x86S does nothing for that.
 

samboy

Senior member
Aug 17, 2002
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Very interesting. 9950X seems to be not listed at Amazon anymore, is $799 on the egg, and $900+ on Ebay. WTH is happening??
Could simply be that the initial allocation has sold out.......... it wasn't that long ago that this happened within the first couple of days of a popular new processor release. Given the under whelming release for this new generation it has simply stayed in stock longer before this happened?
 

Joe NYC

Platinum Member
Jun 26, 2021
2,672
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Very interesting. 9950X seems to be not listed at Amazon anymore, is $799 on the egg, and $900+ on Ebay. WTH is happening??

Whenever the primary seller (Amazon, Newegg) is out of stock (at normal prices) the price switches to 3rd party sellers, who may have high prices.
 

coercitiv

Diamond Member
Jan 24, 2014
6,761
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Is it the case that when MLID says something will happen it means that it will not happen?
Nope, when MLID says something will happen it means you're not wiser after hearing his words: you do not know more about whether it will happen, won't happen, was planned, was not planned. You're just ad revenue.

When MLID says that Schrödinger's cat is dead, you don't even know if Schrödinger is real or not.
 

Abwx

Lifer
Apr 2, 2011
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Josh128

Senior member
Oct 14, 2022
511
865
106
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