Just wanted to address this and it was kind of fun to do:Even in scalar perf X925 is still pretty competitive in raw int IPC, if not in perf/watt.
| Feature | Title |
|---|---|
| FEAT_PMUv3_EXTPMN | Reserving PMU event counters for external agents |
| FEAT_SPEv1p5 | Statistical Profiling Extension version 1.5 |
| FEAT_SPE_EXC | SPE Profiling exception extension |
| FEAT_SPE_nVM | Statistical Profiling physical addressing mode extension |
| FEAT_TRBEv1p1 | Trace Buffer Extension version 1.1 |
| FEAT_TRBE_EXC | Trace Buffer Profiling exception extension |
| FEAT_PoPS | Point of Physical Storage |
| FEAT_SME2p2 | Scalable Matrix Extension version 2.2 |
| FEAT_CMPBR | Compare and Branch instructions |
| FEAT_SSVE_AES | Streaming SVE Mode Advanced Encryption Standard and 128-bit polynomial multiply long instructions |
| FEAT_RME_GPC3 | RME Granule Protection Check 3 Extension |
| FEAT_RME_GDI | RME Granular Data Isolation extension |
| FEAT_SVE2p2 | Scalable Vector Extensions version 2.2 |
| FEAT_SVE_AES2 | SVE multi-vector Advanced Encryption Standard and 128-bit polynomial multiply long instructions |
| FEAT_LSFE | Large System Float Extension |
| FEAT_FPRCVT | Floating-Point to/from Integer in Scalar FP register |
| FEAT_SVE_F16F32MM | SVE Half-Precision to Single-Precision Matrix Multiplication |
| FEAT_F8F16MM | FP8 to Half-Precision Matrix Multiplication |
| FEAT_SSVE_F8F16MM | FP8 to Half-Precision Matrix Multiplication in Streaming SVE mode |
| FEAT_F8F32MM | FP8 to Single-Precision Matrix Multiplication |
| FEAT_SSVE_F8F32MM | FP8 to Single-Precision Matrix Multiplication in Streaming SVE mode |
| FEAT_SVE_BFSCALE | BFloat16 Floating-Point Adjust Exponent |
| FEAT_OCCMO | Outer Cacheable Cache Maintenance Operation |
| FEAT_LS64WB | LS64 for Write-back cacheable memory |
| FEAT_MPAM_MSC_DOMAINS | MPAM Domains PARTID translation |
| FEAT_MPAM_MSC_DCTRL | MPAM Default Resource Control |
| FEAT_MPAM_PE_BW_CTRL | MPAM PE-side Bandwidth Controls |
| FEAT_PCDPHINT | Producer-Consumer Data Placement Hints |
| FEAT_SRMASK | Bitwise System Register Write Masks |
| FEAT_IDTE3 | Trapping ID register accesses to EL3 |
| FEAT_UINJ | Injection of Undefined Instruction exceptions |
| FEAT_NV2p1 | Enhanced nested virtualization support |
| FEAT_LSUI | Unprivileged Load Store |
FEAT_SVE2p2 is OPTIONAL from Armv9.5.
In an Armv9.6 implementation, if FEAT_SVE2 is implemented, FEAT_SVE2p2 is implemented.
If FEAT_SVE2p2 is implemented, then FEAT_SVE2p1 is implemented.
If FEAT_SVE2 and FEAT_SME2p2 are implemented, then FEAT_SVE2p2 is implemented.
Jesus! Ane even the low tier RK35XX has 2 A72 cores, good bye to the useless little cores.
Depends on the size of the GPU if that's a high price or not.
Probably won't be cheap.联发科与英伟达合作的 AI PC 3nm CPU 被曝本月准备流片，预计明年下半年量产 - IT之家
今年 5 月，台媒“经济日报”报道称该款芯片要价高达 300 美元（IT之家备注：当前约 2115 元人民币）。m.ithome.com
The Mediatek/nVidia ARM CPU is going into production at the end of next year... but will be $300? That's really high.
Mediatek probably has more experience than Nvidia in integrating ARM cores and designing an efficient SoC.Probably won't be cheap.
nVidia are likely only partnering with Mediatek because they don't have the modem part of the equation for a full mobile SoC compatible with modern 5G cell standards.
nope only SVE is implemented in DC SoCs.
It's kinda lookin like SME was created to have an official spec to replace the proprietary one Apple made with AMX.ARM loves to talkabout SME but they don't seem to implement in their SoCs.
I'd be surprised if no Snapdragon X Elite SKUs have 5G capability.Why would they partner just because of the 5G modem, when almost no laptops sold come with one?
It's a niche?
Is there any ARM design that is compatible with v9.6 ISA version? If not, and I guess nothing is since it seems it was announced after they announced this year's core designs, it's hard to expect it to be already implementedView attachment 109408
ARM loves to talkabout SME but they don't seem to implement in their SoCs.
Arm A-Profile Architecture Developments 2024
Arm's 2024 v9.6-A extensions introduce significant updates to enhance computing performance, efficiency, and security for today’s AI enabled software.community.arm.com
View attachment 109408
ARM loves to talkabout SME but they don't seem to implement in their SoCs.
Arm A-Profile Architecture Developments 2024
Arm's 2024 v9.6-A extensions introduce significant updates to enhance computing performance, efficiency, and security for today’s AI enabled software.community.arm.com
Qualcomm Snapdragon 8 Gen 5 is rumoured to have SME.It's kinda lookin like SME was created to have an official spec to replace the proprietary one Apple made with AMX.
That's not to say that SME won't ever be in ARM Ltd's own CPU IP - but I wouldn't expect it anytime soon.
Happy to be surprised though if it comes in the 2025-26 IP releases.
It's more likely than ARM Ltd given Nuvia was founded by Apple CPU engineers who may have worked on AMX.Qualcomm Snapdragon 8 Gen 5 is rumoured to have SME.
Arm announces years in advance new ISA features, they've been doing that for years. Intel does exactly the same.Is there any ARM design that is compatible with v9.6 ISA version? If not, and I guess nothing is since it seems it was announced after they announced this year's core designs, it's hard to expect it to be already implemented
*SVE2 for the 2021 CPU IP.Arm cores have had SVE* since Cortex-X2 and A710 announced in 2021. SVE** was announced in 2016 IIRC.