Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

Saylick · Oct 16, 2024

SolidQ said:
MLID speaking with Intel Engineer

This ought to be interesting.

511 · Oct 16, 2024

Are we sure he is an actual Intel engineer not a guy Hired by Mlid To read the Script?

aigomorla · Oct 16, 2024

511 said:
Are we sure he is an actual Intel engineer not a guy Hired by Mlid To read the Script?

i honestly think intel would have a smashing presentation if they did it with AI and used a 3D laser to project a 3d image like they do in Japan for a Hatsune Miku concert.

At least visually they can show off the prowess of the hardware, and earn major brownie points in the process by captivating the audience to ignore what content they may actually present, and win on the ultimate WOW factor.

Doug S · Oct 16, 2024

adroc_thurston said:
GEMM blobs dwelled on phones since late'17.
Where is the stuff?

As others mentioned, stuff like being able to press on the dog in your photo and pull it out is just one example of something that's using the NPU. Just because it wasn't hyped as "AI" and didn't use an LLM didn't mean it didn't using the neural engine on iPhone or the equivalent on Android.

Hitman928 · Oct 16, 2024

SolidQ said:
MLID speaking with Intel Engineer

Is it the same source that told him ARL would be 30 - 40% faster in ST?

AcrosTinus · Oct 16, 2024

SolidQ said:
MLID speaking with Intel Engineer

Again people, employ a minimum of media literacy, please.

SolidQ · Oct 16, 2024

Hitman928 said:
Is it the same source that told him ARL would be 30 - 40% faster in ST?

Maybe, but there did not specify, maybe that was 32% E cores, claimed by Intel

Hitman928 · Oct 16, 2024

SolidQ said:
Maybe, but there did not specify, maybe that was 32% E cores, claimed by Intel

I don't typically like giving him views, but I tried listening to some of the interview out of curiosity (not recommended, it's a brutal listen). I'm pretty convinced the guy he's talking to is not an active Intel employee, or at best, is in marketing or something and not any where near the actual design work. I didn't listen to the whole thing and of course, I could be wrong, but he did not come across as a design engineer at Intel. Also, his willingness to comment on cancelled and future products publicly, supposedly with the blessing of his supervisor, screams not real to me.

gdansk · Oct 16, 2024

Based on previous vetting process it's simple. You show him anything that looks like a badge, pretend to know what you are talking about by saying what he wants to hear and he'll have you on.

Saylick · Oct 16, 2024

gdansk said:
Based on previous vetting process it's simple. You show him anything that looks like a badge, pretend to know what you are talking about by saying what he wants to hear and he'll have you on.

AT Forums needs to scheme up a plan to get one of our forum members on MLID and the goal of that forum member would be to say certain words or to get MLID to say certain words on a mutually agreed on bingo card. Could turn it into a drinking game, then we'd actually have something to look forward to when we watch one of his videos.

OneEng2 · Oct 16, 2024

Core Ultra 9 285K retail samples benchmarked in CPU-Z and Blender — thermal throttling and limited clock speeds spoil the fun

It is still around 10% faster than Raptor Lake Refresh

www.tomshardware.com

It is interesting that it is doing so well in multi-thread. Give credit to all those praising the Skymont cores, but still, there are concerns even in multi-core.

Still not a match for 9950X in multithread despite having 4 more cores. Also, it is thermally limited even on N3B.

Thoughts?

poke01 · Oct 16, 2024

OneEng2 said:
Core Ultra 9 285K retail samples benchmarked in CPU-Z and Blender — thermal throttling and limited clock speeds spoil the fun

It is still around 10% faster than Raptor Lake Refresh

www.tomshardware.com

It is interesting that it is doing so well in multi-thread. Give credit to all those praising the Skymont cores, but still, there are concerns even in multi-core.

Still not a match for 9950X in multithread despite having 4 more cores. Also, it is thermally limited even on N3B.

Thoughts?

AMD has more threads and AVX512 enabled cores which Blender uses. It’s not a surprise to see AMD win.

Saylick · Oct 16, 2024

The article mentions thermal throttling, which I am kind of surprised about given the improved perf/W of the compute tile... I suppose the heat density increased because the core complex got more dense?

gdansk · Oct 16, 2024

poke01 said:
AMD has more threads and AVX512 enabled cores which Blender uses. It’s not a surprise to see AMD win.

The 7950X is within 5%. Without AVX 512. And people here were saying Skymont should be better than Zen 4...

I become more convinced that not even the sons of Skymont can save x64. But I will try to be optimistic. Maybe it was a bad benchmark run.

DavidC1 · Oct 16, 2024

3.8GHz ringbus, so it runs slower than the E cores now. The excuse on Alderlake was that the E cores slowed the ringbus down.

At least we won't have the ringbus dying on us.

OneEng2 said:
It is interesting that it is doing so well in multi-thread. Give credit to all those praising the Skymont cores, but still, there are concerns even in multi-core.

Still not much more than a datapoint. Nothing final positive nor negative until review date.

AMD Ryzen 9 9950X Review - The New Flagship

With 16 cores and 32 threads, the Ryzen 9 9950X, powered by AMD’s Zen 5 architecture, is the fastest desktop processor we've ever tested. In our review, it breezed through application workloads and delivered high FPS rates in gaming. But at $650, it doesn’t come cheap.

www.techpowerup.com

TPU's result in Blender looks better for Intel for example.

Also ARL is 15% better than 14900K according to the result linked by TH.

DavidC1 · Oct 16, 2024

gdansk said:
The 7950X is within 5%. Without AVX 512. And people here were saying Skymont should be better than Zen 4...

I become more convinced that not even the sons of Skymont can save x64. But I will try to be optimistic. Maybe it was a bad benchmark run.

These results actually make sense.

Roughly it was 1 P core = 2 E core for MT in Raptorlake. So assuming HT benefits 20% and 30% respectively.
8 x 1.2 + 8 = 17.6
8 x 1.3 + 8 = 18.4

For Arrowlake,

8 x (5.7/6) x 1.09 + 8 x 1.4(combined 32% Int/55% FP in MT with 65/35 split) = 19.484

6% to 10.7% faster in MT. If P cores had a 14% gain it would have been 8% to 14% faster. This is over a 14900K.

So basically the split was 10.4 + 8 for Raptor Cove, and now it's 8.3 + 11.2, meaning loss of Hyperthreading for the P core is made up by huge gains on the E.

H433x0n · Oct 16, 2024

gdansk said:
The 7950X is within 5%. Without AVX 512. And people here were saying Skymont should be better than Zen 4...

I become more convinced that not even the sons of Skymont can save x64. But I will try to be optimistic. Maybe it was a bad benchmark run.

7950X also has AVX512

MarkPost · Oct 16, 2024

poke01 said:
AMD has more threads and AVX512 enabled cores which Blender uses. It’s not a surprise to see AMD win.

false

DavidC1 · Oct 16, 2024

The 30% gain for Skymont basically cancels out lack of Hyperthreading in the P cores, because it can bring 20-30% gain.

There's also the P core dropping from 14% to 9%.

So in 2024 we basically have a chip combining Netburst and Core.

adroc_thurston · Oct 16, 2024

Doug S said:
like being able to press on the dog in your photo and pull it out is just one example of something that's using the NPU.

This is such a trivial and infrequent case of object detection you can jettison the useless GEMM blob and just use the CPU?
Like this is a catastrophically bad attempt to sell me on a blob of utterly useless dark silicon.

OneEng2 · Oct 16, 2024

DavidC1 said:
These results actually make sense.

Roughly it was 1 P core = 2 E core for MT in Raptorlake. So assuming HT benefits 20% and 30% respectively.
8 x 1.2 + 8 = 17.6
8 x 1.3 + 8 = 18.4

For Arrowlake,

8 x (5.7/6) x 1.09 + 8 x 1.4(combined 32% Int/55% FP in MT with 65/35 split) = 19.484

6% to 10.7% faster in MT. If P cores had a 14% gain it would have been 8% to 14% faster. This is over a 14900K.

So basically the split was 10.4 + 8 for Raptor Cove, and now it's 8.3 + 11.2, meaning loss of Hyperthreading for the P core is made up by huge gains on the E.

For Intel, I have always heard that SMT only provided 10-15%. AMD's Ryzen cores seem to get 20-30% from their SMT implementation.

Saylick said:
The article mentions thermal throttling, which I am kind of surprised about given the improved perf/W of the compute tile... I suppose the heat density increased because the core complex got more dense?

Well, being an engineer myself, I always instruct the new guys to remember "You never get something for nothing". In making Skymont do more, it also burns up more energy doing it. Perhaps not as much as Lion Cove, but between them they have to get the work done.

AMD's Zen 5 on the other hands appears to be capable of running all cores at or near full speed even on N4P (vs Arrow Lake's N3B process). Seems like Intel is going to have to up its game in the efficiency department if they want to be successful with Clearwater Forest .... or 18A is going to have to be much better than N3B.

Once we have a chance for people to really put this new architecture through the ringer things will become more clear, but I wonder if a DC chip designed with only Skymont variants could do well (ie would a die with only Skymont still face thermal limiting in a dense DC chip?).

The other thing that Arrow Lake is facing is the Zen 5 improvements from the OS and BIOS tweaks since its release. Seems like these have added a decent boost from the original release day benchmarks.

OneEng2 · Oct 16, 2024

DavidC1 said:
The 30% gain for Skymont basically cancels out lack of Hyperthreading in the P cores, because it can bring 20-30% gain.

There's also the P core dropping from 14% to 9%.

So in 2024 we basically have a chip combining Netburst and Core.

LOL. Ok, seriously .... it isn't that bad. Come on.

I suspect that Intel will have a "Lion Cove" refresh sometime in the future that will clean up some limiting paths in the core. Also, if Intel can pull off 18A and regain a process lead over AMD (which will be using N3E in 2025/2026, Intel can easily regain the performance crown IMO.

My concern is that if the ONLY way Intel can produce a competitive chip to AMD is for them to utilize a more expensive process to do it ..... the money may simply not work out.

By the time Intel is ready for 3rd parties to use 18A, TSMC N2 will be out and 18A will only be able to charge whatever TSMC is charging for N3X which will no longer be the "premium" node for TSMC.

adroc_thurston said:
This is such a trivial and infrequent case of object detection you can jettison the useless GEMM blob and just use the CPU?
Like this is a catastrophically bad attempt to sell me on a blob of utterly useless dark silicon.

AI is still VERY new. People are still finding ways of using it. I suspect that we will all become totally dependent on it within the next 5 years. There will be LOTS of wonder widgets that use it to do all kinds of things that we can't imagine today ..... but once they are out there, we will all "NEED" them .

DavidC1 · Oct 16, 2024

OneEng2 said:
For Intel, I have always heard that SMT only provided 10-15%. AMD's Ryzen cores seem to get 20-30% from their SMT implementation.

That also depends heavily on the application. Here's one for Nehalem

Nehalem - Everything You Need to Know about Intel's New Architecture

www.anandtech.com

OneEng2 said:
Well, being an engineer myself, I always instruct the new guys to remember "You never get something for nothing". In making Skymont do more, it also burns up more energy doing it. Perhaps not as much as Lion Cove, but between them they have to get the work done.

It also assumes the skill of the teams are same.

OneEng2 said:
LOL. Ok, seriously .... it isn't that bad. Come on.

Just cause it's not a catastrophic failure doesn't mean it cannot be a failure either.

Haswell was 10%, and Skylake was 10%. The design, methodology and the configuration of the team needs to be flipped upside down. They were coasting back then!

What if Intel decided Willamette was a 15 stage pipeline part clocking at 1.2GHz with 2 decoders and 16KB L1D instead? What if Prescott was a 25 stage pipeline part rather than 31?

We're in an era of low process gains now, and it requires more effort, and greater cost to do it. Thus increasingly every step they take needs to be taken into account. Mini-Willamette is still a failure.

DavidC1 · Oct 16, 2024

OneEng2 said:
Every since x86 processors were pipelined and superscalar, it has necessitated that all the instructions be equal length vs x86 variable length instruction and variable length data. As a result, it is my understanding of cpu architecture that x86 instructions are decoded into RISC style equal length instructions prior to going into the pipeline.

In other words, there really isn't much fundamental difference between x86 and RISC architectures today. x86 continues to exist only because of backwards compatibility with decades of code.

Except Atom.

Here's one for Silvermont:

Silvermont, Intel's Low Power Architecture

Silvermont is Intel’s first CPU core tailored for power efficient applications such as smartphones, tablets, and microservers. The 22nm microarchitecture features updated instruction set extensions, full out-of-order execution with a tightly coupled L2 cache, aggressive power management, and a...

www.realworldtech.com

In contrast to Intel’s high-end cores such as Haswell, the instruction decoding in Silvermont does not translate x86 instructions into µops. Silvermont continues to use x86 instructions as the basis of the pipeline, just like Saltwell. Up to two macroinstructions are emitted from the decoders into the instruction queue each cycle.

The microarchitecture of Silvermont is conceptually and practically quite different from Haswell and other high performance Intel cores. The latter decode x86 instructions into simpler µops, which are subsequently the basis for execution. Silvermont tracks and executes macro operations that correspond very closely to the original x86 instructions, a concept that is present in Saltwell.

To say the Lion Cove is more like Skymont lacks understanding, because the two teams think fundamentally different, and went a fundamentally different way.

adroc_thurston · Oct 16, 2024

OneEng2 said:
AI is still VERY new

Alexnex is 12 years old, big dawg.

OneEng2 said:
People are still finding ways of using it

There are no usecases for client GEMM blobs. There hasn't ever been one.

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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