Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

cannedlake240 · Oct 18, 2024

yuri69 said:
3) Qualcomm is far behind; AMD Zen 6 comes in 2 years. So what is the competitive pressure?

QC isn't behind in CPU and battery life. Nvidia, MTK is about to join in. Apple will keep dominating ST perf and other soc stuff. On server Turin still beats Intel by a fair margin

511 · Oct 18, 2024

cannedlake240 said:
QC isn't behind in CPU and battery life. Nvidia, MTK is about to join in. Apple will keep dominating ST perf and other soc stuff. On server Turin still beats Intel by a fair margin

QC/Nvidia+MTK are in laptop Intel is not sitting Idle in Laptop it's the desktop that doesn't have competition till Zen6 as for server yes But GNR is not at bloodbath it will slow AMD quite a bit

alcoholbob · Oct 18, 2024

cannedlake240 said:
It's not that dramatic. They botched the fabric for this gen and it's likely fixed by Nova lake or even Panther lake. This is almost nothing compared to their fabs seemingly having no customers. Going all in on fabs is basically why they are in this situation. Funny it's starting to look like cancelling Panther lake-S was a mistake. If the memory latency and LLC clocks are fixed it could've been a decent generation. Creating more 18A volume for IFS would've been a plus. Also the lga1851 platform wouldn't end up being retired after a single gen which is yet another blow to Intel mind share

I'm guessing this isn't the only issue, as people have done some tests on this and at most its like 3-4% performance difference. If Core 200 series is really struggling to even beat 12th gen, which Arrow Lake has a clockspeed advantage on as kopite7kimi has alluded to, it's got to be a multitude of issues causing the lower gaming performance.

cannedlake240 · Oct 18, 2024

511 said:
QC/Nvidia+MTK are in laptop Intel is not sitting Idle in Laptop it's the desktop that doesn't have competition till Zen6 as for server yes But GNR is not at bloodbath it will slow AMD quite a bit

Wasn't there a post above saying PTL will be worse than LNL in battery and 10W perf due to lacking expensive power delivery and on package memory? And Nvidia could deliver some serious GPU horsepower and game support unlike QC, while MTK makes use of latest powerful ARM x925 cores. NVL apparently doesn't do anything to improve battery life. Intel will need LunarLake 2 to further improve efficiency and address poor MT scaling issue, but they have no plans for that. If LNL sales are good, it might convince them to make another iteration.

From rumors, since Ice lake days Microsoft's been looking to have a custom made Soc. Intel fumbled that for years which made MS consider AMD and ultimately backed Arm based offering, by Nvidia is the rumor afaik. Unlikely that even LNL could win MS back

cannedlake240 · Oct 18, 2024

alcoholbob said:
I'm guessing this isn't the only issue, as people have done some tests on this and at most its like 3-4% performance difference. If Core 200 series is really struggling to even beat 12th gen, which Arrow Lake has a clockspeed advantage on as kopite7kimi has alluded to, it's got to be a multitude of issues causing the lower gaming performance.

Memory latency regression is significant and the low ring clocks similar to 12th gen only add to that. Maybe the lack of HT is resulting in lower perf?

alcoholbob · Oct 18, 2024

cannedlake240 said:
Memory latency regression is significant and the low ring clocks similar to 12th gen only add to that. Maybe the lack of HT is resulting in lower perf?

No, actually removing HT on Raptor Lake increases gaming perf by about 2-3%, it should have the opposite effect…even turning off SMT on 8 core AMD parts increases gaming perf so its not a thread issue.

Magio · Oct 18, 2024

cannedlake240 said:
Wasn't there a post above saying PTL will be worse than LNL in battery and 10W perf due to lacking expensive power delivery and on package memory?

PTL-U will be pretty underwhelming and probably not better as a whole package than LNL. PTL-H however is looking pretty -redacted- good and should easily clear ARL-H and mobile Zen 5 if I had to bet.

Profanity is not allowed in the tech forums.

Daveybrat
AT Moderator

poke01 · Oct 18, 2024

Magio said:
PTL-U will be pretty underwhelming and probably not better as a whole package than LNL. PTL-H however is looking pretty fucking good and should easily clear ARL-H and mobile Zen 5 if I had to bet.

Especially the GPU

Hulk · Oct 18, 2024

I remember reading the ring bus downclocks when all 16 cores are engaged. Is this true and does anyone know more about this behavior?

DavidC1 · Oct 18, 2024

Pantherlake-U is 4+4 with refreshed CPU cores, the same config as Lunarlake. That leaves one part that makes it worse than Lunarlake - battery life.

coercitiv said:
I'm not sure I understood the comment about teams moving to MS, you mean they work within MS for tighter integration?

No, he said the new division within MS few years ago saying they were developing their custom CPU cores didn't materialize out of thin air - they were remnants of people leaving Intel, mostly Meteorlake and Arrowlake(since they share similar designs).

How many Intel people? Same team name acronym they used within Intel was used at MS. CCDC or something.

@511

How worse we would have to see those PMIC are something else the MoP was never that big factor

MoP is not the end all but be all, but in Lunarlake optimizes the memory PHY for lower power. In my laptop, the memory uses 0.5-1W, and the figure is similar all the way until Meteorlake. In Lunarlake, it goes down to 0.1-0.5W.

@OneEng2 In certain specific scenarios it matters but mostly it doesn't. Arrandale/Clarkdale was a downgrade despite 32nm process. We didn't get anything from Ivy Bridge, but we got something nice in Sandy Bridge. It was Haswell's platform focus and S0iX that gained big. Broadwell gained a bit because it further incorporated Haswell's learnings.

Skylake went down not having FiVR. Kabylake got a little due to specific accelerators like VP9, and it still inherited S0iX. Icelake had real low idle power but no better battery life, since it was trivially easy to knock it off the lowest state. Tigerlake was about the same. Alder and Raptor both regressed.

Lunarlake got a big gain thanks to 1) Optimized memory PHY 2) SLC 3) Skymont 4) Thread Director and firmware optimizations 5) PMIC

AMDK11 · Oct 18, 2024

Hulk said:
I'm not following. Gracemont in 2021 was equal to the P core, Skylake of 2105. That's the E core team being 6 years behind the P team.

Now it looks as though 2024 Skymont will equal the performance of 2021 Golden Cove. That's the E team only being 3 years behind the P team. I read your timeline as showing Skymont is somewhat of a wonder. I never thought of it that way but I like the analogy of the E team trying to catch the P team and the P team trying to stay ahead.

The fact that Gracemont (2021) achieved IPC Skylake (2015) and Skymont (2024) achieved IPC GoldenCove/RaptorCove (2021-2022) is not indicative of the size of the Skymont team. If you have time and many years to build a core from an IPC from several years ago, with different solutions and philosophies in (design assumptions), it does not mean that it is something special. They had a lot of time and freedom to optimize the design for a specific purpose.

We are not 100% sure that the next-gen mont/wilk IPC increase will result in another 30% average increase (INT).

For now, it is only a hypothesis and an assumption that subsequent generations will bring a constant, high increase in IPC that will be equal to or greater than the next Cove generation.

It is also uncertain whether the next generation of Cove will only achieve a slight increase in IPC.

LionCove is a redesign combined with changing the monolith to tiles. I think LionCove is losing a lot because of this. Who knows what IPC profits would bring to LionCove if it was on a monolith like RaptorLake.

DavidC1 · Oct 18, 2024

AMDK11 said:
LionCove is a redesign combined with changing the monolith to tiles. I think LionCove is losing a lot because of this. Who knows what IPC profits would bring to LionCove if it was on a monolith like RaptorLake.

Lion Cove was 14% until Arrowlake, which became 9%.

If Skymont in Arrowlake gets 32%/72% while Lion Cove gets 9%, then it follows logically that if Lion Cove gets back up to 14%, Skymont would get 38%/80%, meaning the true gap between the two cores per clock is minimal.

This is the more disappointing part of Lion Cove - if 9% is combined, and it added more FP units, then it suggests in Integer the gains are lower than 9%. It might be 7% for Int and 13% for FP. That would mean in Integer it's essentially identical to Skymont.

AMDK11 · Oct 18, 2024

AMDK11 said:
Pentium 4 never had more than a 1-Way decoder and even in its last incarnation it was not intended to have a higher IPC but to achieve even higher clock speeds.

Compared to GoldenCove, LionCove, despite dividing the execution engine into a separate one for FP and a separate one for ALU and increasing the total number of execution ports from 5 to 10, absolutely gains only one FP, ALU and AGU unit.

I would reserve the final verdict until independent tests.

This is just a hypothesis, as Netbrust has never had a larger number of execution units or a wider decoder in any generation. How Netbrust would behave if the next generation had a decoder width of 2 instead of 1 is pure hypothesis.

Netbrust has never fought for a higher IPC. Netbrust is a completely different philosophy and has seen IPC drops in subsequent generations.

I wouldn't find any similarities between LionCove and Netbrust. LionCove has a higher IPC, but also loses due to lower clock speeds and suffers in the transition from monolith to tiles.

A complete picture of LionCove's IPC will become available after comprehensive analysis and testing of ArrowLake-S.

DavidC1 · Oct 18, 2024

The biggest problem for Intel is that some are saying that E cores are gone and Unified Core led by the E core team is the future, but politics play by the P core team may end up killing the UC, meaning total end of that line.

Then it will be a nail in the coffin for Intel.

Although I think that view is extremely pessimistic(maybe beyond bounds of reality), the possibility is scary.

AMDK11 · Oct 18, 2024

DavidC1 said:
Lion Cove was 14% until Arrowlake, which became 9%.

If Skymont in Arrowlake gets 32%/72% while Lion Cove gets 9%, then it follows logically that if Lion Cove gets back up to 14%, Skymont would get 38%/80%, meaning the true gap between the two cores per clock is minimal.

This is the more disappointing part of Lion Cove - if 9% is combined, and it added more FP units, then it suggests in Integer the gains are lower than 9%. It might be 7% for Int and 13% for FP. That would mean in Integer it's essentially identical to Skymont.

Look at it from a different perspective.

Skymont gains this IPC increase for Integer at 8x ALU compared to 6x ALU in LionCove and 4x ALU in Gracemont, for FP 4x 128bit compared to LionCove 2x 256/128bit and Gracemont 2x FP 128bit.

Skymont achieves this IPC with a 3x3-wide (total 9-wide) decoder compared to LionCove's 8-wide and Gracemont's 2x 3-wide (total 6-wide).

No, LionCove in LunarLake has on average 14% higher IPC than RedwoodCove in MeteorLake.

RedwoodCove does not have a lower IPC than RaptorCove, but the tiles in Meteor caused a drop in average IPC.

We see a similar situation in ArrowLake-S, except that the LionCove microarchitecture gains a much higher IPC, unfortunately losing these gains through tiles.

I'm not saying that Skymont doesn't lose IPC due to the ArrowLake project.

DavidC1 · Oct 18, 2024

AMDK11 said:
Look at it from a different perspective.

Skymont gains this IPC increase for Integer at 8x ALU compared to 6x ALU in LionCove and 4x ALU in Gracemont, for FP 4x 128bit compared to LionCove 2x 256/128bit and Gracemont 2x FP 128bit.

Skymont's 4 additional ALUs cannot execute all instructions. They are simpler, that's why they were able to add that many.

AMDK11 said:
Skymont achieves this IPC with a 3x3-wide (total 9-wide) decoder compared to LionCove's 8-wide and Gracemont's 2x 3-wide (total 6-wide).

The clusters are a superior approach, taking far less complexity and size.

3x core size difference is proof that the E core team takes a much more careful, thoughtful approach with substantial better execution.

This is why I am saying that eventually details are all words. The results tell you whether those words are worth listening to.

AMDK11 · Oct 18, 2024

DavidC1 said:
Skymont's 4 additional ALUs cannot execute all instructions. They are simpler, that's why they were able to add that many.

The clusters are a superior approach, taking far less complexity and size.

3x core size difference is proof that the E core team takes a much more careful, thoughtful approach with substantial better execution.

This is why I am saying that eventually details are all words. The results tell you whether those words are worth listening to.

LionCove has ALU with more MUL, SHIFT and Branch. There are more of these units in ALU LionCove. The fact is that Skymont with 8xALU reaches the IPC level of RaptorCove with 5xALU, and LionCove has 6xALU. Gracemont also doesn't have the more complicated ALUs and in that respect Skymont adds twice as much.

FP 4x128bit in Skymont is also a very big advantage over Gracemont 2x 128bit and 2x128bit for LionCove.

However, when workloads use more MUL, SHIFT, BRANCH, FP 256, etc., Skymont will perform much worse.

My mistake, because there are as many execution Branch units in Skymont as in LionCove.
Skymont adds a huge number of execution units, not only ALUs and FPs, but also AGUs.

mikk · Oct 18, 2024

DavidC1 said:
Pantherlake-U is 4+4 with refreshed CPU cores, the same config as Lunarlake. That leaves one part that makes it worse than Lunarlake - battery life.

LNL 8 Xe cores
PTL-U 4 Xe cores

GPU will be much worse.

MS_AT · Oct 18, 2024

AMDK11 said:
LionCove has ALU with more MUL, SHIFT and Branch. There are more of these units in ALU LionCove. The fact is that Skymont with 8xALU reaches the IPC level of RaptorCove with 5xALU, and LionCove has 6xALU. Gracemont also doesn't have the more complicated ALUs and in that respect Skymont adds twice as much.

FP 4x128bit in Skymont is also a very big advantage over Gracemont 2x 128bit and 2x128bit for LionCove.

However, when workloads use more MUL, SHIFT, BRANCH, FP 256, etc., Skymont will perform much worse.

Lion Cove has 4 256b SIMD units 2 capable of FMA/MUL, 2 capable of FP addition. I think all are capable of INT addition.

cannedlake240 · Oct 18, 2024

mikk said:
LNL 8 Xe cores
PTL-U 4 Xe cores

GPU will be much worse.

It's 4 Xe3 cores though, + higher clocks may be possible with a higher power limit. It's on Intel 3 however so efficiency won't be as good

GTracing · Oct 18, 2024

AMDK11 said:
LionCove has ALU with more MUL, SHIFT and Branch. There are more of these units in ALU LionCove. The fact is that Skymont with 8xALU reaches the IPC level of RaptorCove with 5xALU, and LionCove has 6xALU. Gracemont also doesn't have the more complicated ALUs and in that respect Skymont adds twice as much.

FP 4x128bit in Skymont is also a very big advantage over Gracemont 2x 128bit and 2x128bit for LionCove.

However, when workloads use more MUL, SHIFT, BRANCH, FP 256, etc., Skymont will perform much worse.

My mistake, because there are as many execution units in Skymont as in LionCove, including: BRANCH.
Skymont adds a huge number of execution units, not only ALUs and FPs, but also AGUs.

The number of ALUs that a core has is practically irrelevant. Different ALUs can execute different uops. Those high level block diagrams are really only useful as an overview. I wouldn't compare them like that.

DavidC1 · Oct 18, 2024

AMDK11 said:
LionCove has ALU with more MUL, SHIFT and Branch. There are more of these units in ALU LionCove. The fact is that Skymont with 8xALU reaches the IPC level of RaptorCove with 5xALU, and LionCove has 6xALU. Gracemont also doesn't have the more complicated ALUs and in that respect Skymont adds twice as much.

Lion Cove is a fat, bloated design that's the worst of current generation.

Crestmont has same number of full ALUs as Skymont - 2. Skymont adds 4 more ALUs, but they are simple. Lion Cove has 3 full ALUs.

All these details are nothing but talk though. Inconsequential in light of:

3x core size difference is proof that the E core team takes a much more careful, thoughtful approach with substantially better execution.

Skymont adds a huge number of execution units, not only ALUs and FPs, but also AGUs.

Sure, and they added it in a very efficient manner. This is despite literally doubling the FP block enabling the massive 72% improvement. Without it it would have been <1mm2 in size rather than 1.15mm2.

You still didn't address the fact that if 5% penalty for ring was true for Lion Cove, then it also applies for Skymont, and rather than 32%/72% we might have seen 38%/80%.

Skymont derivatives are Intel's future. The current Haifa IDC P core design is on life support!

DavidC1 · Oct 18, 2024

This is from Intel X:

https://twitter.com/x/status/1844392525395640401

No Hyper-Threading? No problem. #ArrowLake leads in multithread performance thanks to highly performant Skymont E-cores, which boast monstrous double-digit IPC uplifts in MT workloads compared to last gen. Watch the full processor breakdown here:

Even Intel knows Lion Cove sucks.

cannedlake240 · Oct 18, 2024

DavidC1 said:
The biggest problem for Intel is that some are saying that E cores are gone and Unified Core led by the E core team is the future, but politics play by the P core team may end up killing the UC, meaning total end of that line.

Then it will be a nail in the coffin for Intel.

Although I think that view is extremely pessimistic(maybe beyond bounds of reality), the possibility is scary.

If there are no e core products this UC could be canned any moment Intel feels the financial squeeze

AMDK11 · Oct 18, 2024

Apple in Mx and ARM adds a total of 8 ALUs, gaining a significant IPC increase for INT, but in your opinion Skymont adds 2x more for no reason? This has absolutely no impact on the IPC increase for Integer (sarcasm)

Core: Crestmont Skymont
Integer
ALU: 4 8 (+100%)
MUL: 2 2
Branch: 2 3 (+50%)
Store Data: 2 2
Load AGU: 2 3 (+50%)
Store AGU: 2 4 (+100%)

FPU
INT Vec ALU: 3 4 (+33%)
INT Vec MUL: 2 2
FMA: 2 4 (+100%)
FADD: 2 4 (+100%)
FMUL: 2 4 (+100%)
AES: 2 2
SHA: 1 1
FStore 2 2

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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