Discussion Qualcomm Snapdragon Thread

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DZero

Senior member
Jun 20, 2024
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I guess, but getting Linux support for it would have been boss. Only real flaws from an end-user point-of-view were:

Wrong version of Win11
Having to use USB-C for display

It was easily the best-cooled, highest-end X Elite machine available. If you really wanted to tinker with X Elite to see what it could do pushed to its limits, it was the best rig for the job. Good luck finding the 100 SKU in laptops. It's practically unobtainium.
Why I feel that the Chinese will pull the 100 SKU in Mini PC using those unused processors?
And with that, with ALL the flaws corrected.
 

FlameTail

Diamond Member
Dec 15, 2021
4,238
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CPU

'Prime' and 'Performance' cores. Interesting.
• 24 MB Total Cache: the article text clarifies that this is 12 MB L2 + 12 MB L2.

GPU
• New Sliced Architecture: the article text says Adreno 830 has 3 slices. So that's 3 slices of four CUs each, for a total of 12 CUs.
• They are advertising it can run Unreal Engine, Nanite and Chaos Engine, which suggests that the Adreno 8 GPU architecture brings substantial improvements.

Memory
5.3 GHz memory speed indicates support for Samsung's LPDDR5X-10667, the newest and fastest LPDDR memory available in the market.
 
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FlameTail

Diamond Member
Dec 15, 2021
4,238
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? GMEM = Graphics Memory

Do you mistook it for GEMM (General Matrix Multiply)?
Yes, I edited it out.

Well, it's interesting the GMEM cache is still sticking around in the Adreno 8 series architecture. I thought they might remove it and instead go for a big L2 cache.
 

MS_AT

Senior member
Jul 15, 2024
365
798
96
View attachment 109850
CPU

'Prime' and 'Performance' cores. Interesting.
• 24 MB Total Cache: the article text clarifies that this is 12 MB L2 + 12 MB L2.

GPU
• New Sliced Architecture: the article text says Adreno 830 has 3 slices. So that's 3 slices of four CUs each, for a total of 12 CUs.
• Onboard GMEM. For DLSS-like upscaling?
• They are advertising it can run Unreal Engine, Nanite and Chaos Engine, which suggests that the Adreno 8 GPU architecture brings substantial improvements.
Eh, marketing 5.3 GHz LPDDR5x, so 10.6MT/s. They tried to do the right thing, just the wrong way

About UE, Nanite etc, Gen3 wasn't able to run them due to APIs or due to insufficient performance? As it's one thing to run it another is to run it well

It's also interesting they use Geekbench 6.2 and not 6.3. Might be they want to be consistent when comparing against Apple, or they have other reasons.

All in all, holding excitement at bay until we see retail reviews.
 

FlameTail

Diamond Member
Dec 15, 2021
4,238
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A18 Pro = 16 MB L2 + 4 MB L2
D9400 = 7 MB pL2 + 12 MB L3
8 Gen 3 = 5 MB pL2 + 12 MB L3
8 Elite = 12 MB L2 + 12 MB L2

8 Elite has the largest ever CPU-only caches in a mobile SoC!
 
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Raqia

Member
Nov 19, 2008
63
32
91
Looks like the deep-dive is up (includes die shots even):


Big win on CPU in performance and efficiency, looks like a big improvement over what we saw from the X-Elite. GPU looks mostly on par with the 9400 (although benchmarks were done w/ slower ram), but is a touch less efficient. (I'd probably still go w/ Adreno due to better driver compatibility...)
 
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jdubs03

Golden Member
Oct 1, 2013
1,079
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The MT performance at iso power to the A18P is pretty solid I must say.
Maybe that’ll encourage Apple to consider two more e-cores.
 

FlameTail

Diamond Member
Dec 15, 2021
4,238
2,594
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Looks like the deep-dive is up (includes die shots even):


Big win on CPU in performance and efficiency, looks like a big improvement over what we saw from the X-Elite. GPU looks mostly on par with the 9400 (although benchmarks were done w/ slower ram), but is a touch less efficient. (I'd probably still go w/ Adreno due to better driver compatibility...)
Key slides:

Oryon-L and Oryon-M

CPU MT efficiency curve better than D9400 and A18 Pro.

4 MB of cache per slice. Total of 12 MB
That's a lot of cache!

Neck and neck with D9400 in Steel Nomad Light

124 mm² for 8 Elite die.
 
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FlameTail

Diamond Member
Dec 15, 2021
4,238
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There’s 192KB L1 cache per Prime core and 128KB per Performance core.
Prime Core = Oryon-L = 192 KB L1i ?
Performance core = Oryon-M = 128 KB L1i ?

Curious difference. Wonder what the data caches are.
We do know that the Prime and Performance cores share the same architecture, they are simply optimized for single and multi-threaded workloads based on clock speed, cache, etc..
So they are the same microarchitecture after all!
 
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Raqia

Member
Nov 19, 2008
63
32
91
Key slides:
View attachment 109898View attachment 109899View attachment 109900
Oryon-L and Oryon-M
View attachment 109901
CPU MT efficiency curve better than D9400 and A18 Pro.
View attachment 109902View attachment 109903
4 MB of cache per slice. Total of 12 MB
That's a lot of cache!
View attachment 109904
Neck and neck with D9400 in Steel Nomad Light
View attachment 109905
124 mm² for 8 Elite die.
Energy efficiency is finally what we expected from the CPU architecture with efficiency cores, and GPU efficiency support for modern rendering loads is finally there as well.

One wonders what a bigger version of the GPU might look like in terms of slice layout and count... A laptop SKU should come in at around 150mm^2 (possibly without a modem block), so a doubling of CPU, GPU, and shared caches in terms of die area looks feasible for next year.

The 8 Elite could easily power a class leading laptop today with better efficiency than the X-Elite, although it would give up a bit in MT performance. Excited for what the X-Elite Gen 2 might bring with an even better CPU / GPU design...
 
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FlameTail

Diamond Member
Dec 15, 2021
4,238
2,594
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They are calling the Oryon CPU in 8 Elite as '2nd gen'.


The performance-per-uplift compared to '1st gen Oryon' in X Elite is gigantic.

N4P -> N3E alone cannot explain this improvement.
 
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jdubs03

Golden Member
Oct 1, 2013
1,079
746
136
Why? To win at benchmarks? Show me the real world smartphone code that is running all cores flat out for any length of time.
Well they’ve said they won’t do things just to win benchmarks but then we’ve seen 18.1 beta 5 reverse at least the decline in benchmark results (how is up to interpretation). Theoretically they could have better performance at lower wattage as long as their e-cores are sufficient.
—————————
One thing from the slides I noticed is on ST, it does pull over 9W.
 

hemedans

Senior member
Jan 31, 2015
244
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Why? To win at benchmarks? Show me the real world smartphone code that is running all cores flat out for any length of time.
To be more efficient, E cores are workhorse of Soc in mobile, P cores are just for burst perfomance, 6 E cores would definetely help reducing power usage compare to 4 E cores.
 
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