What could ARMv10 look like?
Will it be a minor change like ARMv9, or a major overhaul like ARMv8 was?
Will it be a minor change like ARMv9, or a major overhaul like ARMv8 was?
As with all things it will depend on what the market demands.What could ARMv10 look like?
Will it be a minor change like ARMv9, or a major overhaul like ARMv8 was?
Finally some OSS using SVE2!Changes for 1.5.0 'Sonic':
--------------------------
1.5.0 is a major release of dav1d, that:
- WARNING: we removed some of the SSE2 optimizations, so if you care about
systems without SSSE3, you should be careful when updating!
- Add Arm OpenBSD run-time CPU feature
- Optimize index offset calculations for decode_coefs
- picture: copy HDR10+ and T35 metadata only to visible frames
- SSSE3 new optimizations for 6-tap (8bit and hbd)
- AArch64/SVE: Add HBD subpel filters using 128-bit SVE2
- AArch64: Add USMMLA implempentation for 6-tap H/HV
- AArch64: Optimize Armv8.0 NEON for HBD horizontal filters and 6-tap filters
- Power9: Optimized ITX till 16x4.
- Loongarch: numerous optimizations
- RISC-V optimizations for pal, cdef_filter, ipred, mc_blend, mc_bdir, itx
- Allow playing videos in full-screen mode in dav1dplay
Finally some OSS using SVE2!
Interesting that it specifies 128 bit tho - I wonder if the code is incapable of automatically scaling 🤔
It's still faster than NEON: https://code.videolan.org/videolan/dav1d/-/commit/01558f3f6609b750f6a850960119bec9e8fbe018Finally some OSS using SVE2!
Interesting that it specifies 128 bit tho - I wonder if the code is incapable of automatically scaling 🤔
Not surprising.It's still faster than NEON: https://code.videolan.org/videolan/dav1d/-/commit/01558f3f6609b750f6a850960119bec9e8fbe018
They are aleady able to do 3x256b since they already have 6x128b execution units in X925. So theoretically they could make that happen with X935.I wonder if we will ever see 256 bit SVE2 in Cortex X cores.
If they did I would assume that they would wait until they next add another 2x 128 bit ALUs like they did with X925 so that they would have enough ALUs for at least 2x 256 bit units.
Going by the time since the last increase with A77 -> X1 that's 4 generations ahead, or X945 if the naming scheme continues that long for the X900 and A700 IP.
That might change though if there is a more significant process node shift expected in the mean time vs what we have had in the time from X1 -> X925.
Oh my bad, I'd forgotten it was 6x 128.They are aleady able to do 3x256b since they already have 6x128b execution units in X925. So theoretically they could make that happen with X935.
Why X935?So theoretically they could make that happen with X935.
Oh no significance. I just wanted to point out they could theorethically do it next generation and I used 935 assuming it to be next in lineWhy X935?
I was under the impression that ARM increments the model number is by fives.Oh no significance. I just wanted to point out they could theorethically do it next generation and I used 935 assuming it to be next in line
Oh no significance. I just wanted to point out they could theorethically do it next generation and I used 935 assuming it to be next in line
I am also assuming nomenclature increments in fives.I was under the impression that ARM increments the model number is by fives.
The A5XX actually feels dead now.Oh yeah, except for A5xx which increments in tens, as it only gets an update every 2nd generation of IPs at the moment.
Only in premium smartphone. There are tons of other e-waste it goes in. Like smartwatches.The A5XX actually feels dead now.
Bloomberg interviewed ARM CEO yesterday;
Q: I wanted to turn to: you talked about Arm moving up the value stack, kind of moving beyond its traditional place in the industry. And as you have moved up the value chain, you've gotten closer to what some of what your customers do.
Arm CEO: Right.
Q: Getting closer to being able to do these complete designs. And yes, it speeds up innovation, as you were alluding to, but it also puts you in closer competition with some of your customers. You have a lawsuit with Qualcomm in particular?
Arm CEO: Yeah.
Q: Isn't it in both companies interest to settle that and to resolve the legal dispute at this point? Or what would you say about that?
Arm CEO: These are these are tough questions. It's a good thing I'm a podcaster, so I know what's coming.
You know, first thing on, competing with our customers, you know, it's rather complicated because if you look at some of our customers, our customers are Amazon. Our customers are Microsoft. Our customers are Apple. Our customers are Tesla. They all build chips using ARM. I'm not going to build an electric car. I'm not going to build a phone. I'm not going to build a data center.
So to look at the value chain relative to who builds chips, relative to whether your end business is a chip business or a product business, it's gotten a lot more gray. We follow what the industry is demanding, and what the industry wants to see is solutions getting to market faster. And that's what we're focused on.
Qualcomm: not much I can say on that, other than we're headed to a trial. I think it's the third week in December. We feel very good about our case. We think our case is quite simple and straightforward. And as I said, December, we'll find out.
Q: Okay. So you head to the courtroom then.
So, unless something massive comes from the summary judgments, we are likely to see a trial (which is helpful to to expose / explain / reveal what actually happened, as much is still redacted). Settlements, presumably, only post-trial, post-Judgment, or even post-Appeals.
Following Qualcomm’s repeated material breaches of Arm’s license agreement, Arm is left with no choice but to take formal action requiring Qualcomm to remedy its breach or face termination of the agreement. This is necessary to protect the unparalleled ecosystem that Arm and its highly valued partners have built over more than 30 years. Arm is fully prepared for the trial in December and remains confident that the Court will find in Arm’s favor. (Source: Arm statement to STH)
This is more of the same from ARM – more unfounded threats designed to strongarm a longtime partner, interfere with our performance-leading CPUs, and increase royalty rates regardless of the broad rights under our architecture license. With a trial fast approaching in December, Arm’s desperate ploy appears to be an attempt to disrupt the legal process, and its claim for termination is completely baseless. We are confident that Qualcomm’s rights under its agreement with Arm will be affirmed. Arm’s anticompetitive conduct will not be tolerated.
Meh, really? What is really the point then?SVE is incapable of doing vector-length agnostic binary code - code has to be compiled to target vector length.
Meh, really? What is really the point then?
I thought it would just be suboptimal but function without recompiling (after recompiling it would be suboptimal anyway, though, because you can have your abstracted length-agnostic SIMD but turns out that idea sucks in practice, wrt shuffle instructions for example).