Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

Senior member
Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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Ranulf

Platinum Member
Jul 18, 2001
2,553
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For the moment, it's DOA for gamers. There has to be significant gains waiting on microcode and OS updates, because something is as broken as ARC at the moment. I dislike using geomean, here's why -

View attachment 110261

20 games with double digit losses, 15 where it's basically 20-50%. That's- "Yes police, I'd like to report a murder" territory. If she'd added F1 '24 that's another 20%+ beatdown. This can't be all there is without overclocking and budget breaking stupidly expensive ram, it can't be...

That is pretty brutal. $630 vs $475 (formerly $350).
 

Hulk

Diamond Member
Oct 9, 1999
4,612
2,645
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Do the apps where ARL is lagging generally use only a few cores? Wondering if there is P and E confusion going on here?

 

Hulk

Diamond Member
Oct 9, 1999
4,612
2,645
136
Can you explain further Hulk? I’m not familiar with tuning. Is that bad?
1.480 Vcore is in my opinion too much for Intel 7, much less a smaller node, under ambient for day-to-day use. You are practically begging for degradation. Everybody has a different opinion but I keep my 14900K under 1.3V and it's generally under 1.2V when under load.

This person got a great sample and is pushing it to the limit. It's great to show what ARL can do but not really useful for people that want to use these CPU's for longer than a few weeks.
 
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poke01

Platinum Member
Mar 8, 2022
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Do the apps where ARL is lagging generally use only a few cores? Wondering if there is P and E confusion going on here?

Yes for example Photoshop is lightly threaded, definitely scheduling issues here
 

Josh128

Senior member
Oct 14, 2022
463
750
106

Techspot 285K scored 150 in CB2024 ST. Must be one golden sample. Any other reviewer 285K CPUs scored 150?
Look at the HUB video right below where you posted this.
 

AMDK11

Senior member
Jul 15, 2019
438
360
136
I agree. N3B should have provided fertile ground for better power efficiency than we are seeing. If all AMD did was shrink 9950x down to N3B we would expect much better results than this. In fact, we would expect that the additional transistor budget would have been used in the desktop to much better effect IMO.

The e Cores on Arrow Lake seem pretty good to me (especially without SMT). What exactly do you use as evidence for this statement?

I believe @511 mentioned this earlier, but Intel design team has relied WAY too much over the years on the foundry making miracles for them. As the cost of new Lithography processes and machines has grown exponentially, continuing on this strategy is a death sentence. Intel must be able to sell its foundry services to spread the obscene cost of the development to others as TSMC does. They ALSO need to get their design teams aligned with the idea that they must design within the limits of the process generation they will release at and not to expect a 1-2 node advantage over the entire industry for their designs to be competitive.

I agree. Study after study has shown that both the power efficiency and space efficiency of SMT is hugely worth it. I am baffled by this decision as well.

First, I believe that the ring bus implementation is hurting Arrow Lake greatly. I am pretty sure that Intel will figure it out in the next iteration and the Lion Cove follow on core will reap huge benefits from it in ST performance (and everyone's blessed games for the love of God).

Second, I have also heard a lot about Lion Coves architecture being created such that the resources are all kept pretty busy and that as a result, SMT would not provide much of an uplift. If that is correct, then it isn't enough for Intel to just slap on SMT, it would require a pretty big overhaul.

Read my reply above. I think it would require an overhaul of the design to make SMT an effective part of the design.

... and THIS is one of the biggest problems Intel has. AMD's Zen 5 design works beautifully in DC applications. It is interesting that only Turin dense is on N3E while Turin is on N4P. I will be interested to see how Clearwater Forest on 18A does.

Certainly we all love a good ole Core 2 release like back in the day. Better in everything by a long shot, less power ..... and by God, it is even a nicer looking processor!

I think that with the death of "Tock" due to the exponential cost of new process nodes ..... and .... you know ... physics, we will be seeing more "Tick's" in the future and that 5% to 10% is about all we should be expecting IMHO.

One has to wonder had the spent a little bit more transistor budget on a better branch predictor, and a little bit more on SMT, and wouldn't have botched the ring bus, that we wouldn't have seen a pretty darned fantastic CPU today.

Well ..... inevitably as you process more information (and rendering is a VERY information heavy workload), you must be able to feed the engine. So I would argue that the P core is, in fact, "awesome" in that it is able to fully utilize all that considerable bandwidth. It also seems to do well in CB2024 MT.

Awww yes, Anand was definitely a gem. I remember debating with him in the very early day's of AnandTech. Good guy.
Chips and Cheese:
 

Hitman928

Diamond Member
Apr 15, 2012
6,330
11,172
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Something went massively wrong with this launch. It was a terrible idea in the first place, to launch amidst all the turmoil, restructuring, and layoffs. "It hurts itself in its confusion" Did departing employees intentionally gaslight higher ups? I ask because Leo of KitGuru had a 7 on 1 teams call including Robert Hallock. He said they seemed confused and very serious.

Intel is known for having a slideware engineer problem. They could get away with it for many years when Intel was a near monopoly, but now that there's real competition, the tide has gone out and they can no longer hide their nakedness.
 

511

Senior member
Jul 12, 2024
747
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Intel is known for having a slideware engineer problem. They could get away with it for many years when Intel was a near monopoly, but now that there's real competition, the tide has gone out and they can no longer hide their nakedness.
They have been caught with their Pants down on both design and Fab sides and both were so interdependent on each other's success for years
 

RTX2080

Senior member
Jul 2, 2018
333
533
136
Do the apps where ARL is lagging generally use only a few cores? Wondering if there is P and E confusion going on here?


Yes for example Photoshop is lightly threaded, definitely scheduling issues here

I presume there's little to no scheduling issue, and more of it is memory/latency issue.

If you read Microsoft Office and Adobe ranking by TPU, you can find it could be easily diagnosed as MS/Adobe test suites are memory sensitive benchmarks, and it's memory/latency issue which leads to poor performance in these test suites with Ultra 200. What's coincident is 285k is roughly on par with 14600k in gaming which is memory sensitive as well.





Latency issue has been already there since Meteorlake and Tile based design is to blame, I guess there would be nothing Microsoft or Intel can do here, and these issues cannot solved by using better memory.
 
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