Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

Golden Member
Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.




Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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adamge

Member
Aug 15, 2022
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AI chips are running into reticle limit and any improvement to squeeze more performance in the same area will be worth it because they can sell for a much higher price. Others will just have to wait until price becomes more affordable.
Remember when bitcoin mining chips were featured in this scenario?
 

OneEng2

Member
Sep 19, 2022
160
207
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It was always expected that the Arizona fab would make N5 family stuff when N3 was state of the art. They'll probably start making N3 class stuff in Arizona around the time Apple's leading edge is using A16.

Arizona is never gonna be high volume for Apple unless TSMC stops restricting the leading edge stuff to Taiwan. Obviously for multiple reasons Apple would like it if TSMC had leading edge production in both Taiwan and the US, but Taiwan's govt may not see that as being in their interest as far as US willingness to intervene in a conflict with China.
This is absolutely true. As long as the US economy (and the worlds economy) will be driven into a nose dive by China invading Taiwan, the US will guard the island like a nugget of gold with 2 carrier groups full of F35's and enough ballistic missiles and submarines to keep the Chinese military in check.
They made a mistake.

18A offers 30% density improvement over Intel 3, not greater than 50% as it's listed. Intel themselves revealed it, so how can they get that wrong? Whole lot of words and gets the publicly revealed facts wrong.
Indeed. Not sure where the 50% figure came from.
Wrong. Intel never said anything about density numbers (those are just rumors). Daniel Nenni himself stated that density improvement is around 1.6X, which is perfectly in line with the semianalysis article's number of >50%.

Intel 3 to 18A is a big jump.

N3E to N2 is expected to be minor jump only. This puts them on equal footing in density with 18A probably a bit behind in density and a bit ahead in performance due to BSPDN.
About the same as Intel 3 to 18A which will put it more on par with N3X, not N2 in performance and density. You do have a point about BSPDN though.
Thats lower than expected. This should put 18A behind N2 in density somewhere between 10% to 15%. But should still put it ahead in performance.
I wouldn't think so, but it is hard to know for sure from where we stand today.
View attachment 108575
That's just chip density without utilization.
Exactly. Great post and presentation media. It is also my understanding that using BSPD gives you efficiencies in overall chip power delivery stability as well which can lead to better clock speeds.

TSMC N2 might be over 30k a wafer. Which sounds about right.
Very expensive. I suspect they spent a TON of money for the ASML equipment and development effort for N2. It seems like cost is on an exponential curve. Can't imagine this continuing much more.
Probably why AMD has already ceded the latest TSMC nodes to Apple.
Nope. As others have indicated, AMD is on N3E and N3P for a couple of new products.
wrong.
But you'll have to tile stuff to keep the cost in check.

Turin-D is N3e.
Don't be silly.

It's looking more like the future nodes are just going to cost even more.

It would not be that surprising if node progression ends because it would be tough to justify the cost (as opposed to feasibility).
Me too. I always thought that quantum tunneling would get die shrinks in the end. Turns out astronomical costs will get there first!
 

OneEng2

Member
Sep 19, 2022
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There's some ppa increase in the latest N3.
.. and not a trivial one either. 9% density improvement in a tweaked N3 process. Low risk, high yield, what's not to like?

I wonder if the price will be the same or lower than N3E/N3P?

Pretty good business model TSMC has going for it. They keep improving the capabilities of their older equipment in parallel with developing new equipment processes for the generational increase.

I suspect it lets them continue to charge more premium prices on older equipment even when new equipment is introduced. Helps pay off that God awful initial cost of new equipment in Lithography these days.
 

Executor_

Junior Member
Mar 4, 2010
20
2
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Am I missing something? In order to get that 9% density improvement, you have to switch from a 3-2 fin cell to a 2-fin cell. But the reason you'd be using 3-2 fin cells in the first place is because you needed your chip to support higher voltages/frequencies. So if before your chip could hit 5GHz, now it might only do 4GHz.
 

Hitman928

Diamond Member
Apr 15, 2012
6,332
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Am I missing something? In order to get that 9% density improvement, you have to switch from a 3-2 fin cell to a 2-fin cell. But the reason you'd be using 3-2 fin cells in the first place is because you needed your chip to support higher voltages/frequencies. So if before your chip could hit 5GHz, now it might only do 4GHz.

If I remember right, 3-2 only gets you 6% higher frequency over 2-2. They say N3X gives you 5% higher frequency. So going with N3X and 2-2 fin is basically a wash frequency wise compared to N3E N3P 3-2 fin. You get the same frequency with less area but more leakage.
 
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OneEng2

Member
Sep 19, 2022
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Am I missing something? In order to get that 9% density improvement, you have to switch from a 3-2 fin cell to a 2-fin cell. But the reason you'd be using 3-2 fin cells in the first place is because you needed your chip to support higher voltages/frequencies. So if before your chip could hit 5GHz, now it might only do 4GHz.
I think that in general you are correct on the trade-off; however as Hitman points out, it isn't as straight forward as that.
If I remember right, 3-2 only gets you 6% higher frequency over 2-2. They say N3X gives you 5% higher frequency. So going with N3X and 2-2 fin is basically a wash frequency wise compared to N3E 3-2 fin. You get the same frequency with less area but more leakage.
From here: https://www.anandtech.com/show/2139...nology-on-track-for-mass-production-this-year
Meanwhile, looking towards the immediate future at TSMC, N3P has finished qualification and its yield performance is close to N3E, according to the company. Being an optical shrink, the N3P node is set to enable processor developers to either increase performance by 4% at the same leakage or reduce power consumption by 9% at the same clocks (previously the range was between 4% ~ 10% depending on design). The new node is also set to boost transistor density by 4% for a 'mixed' chip design, which TSMC defines as a processor consisting of 50% logic, 30% SRAM, and 20% analog circuits.
 
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KompuKare

Golden Member
Jul 28, 2009
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Well that's interesting. It's about time that Intel woke up and smelled the bacon. Why didn't they invite GlobalFoundries to the table?
Well it sounds mostly like that point in the Civilisations games when your diplomatic report say that other civilisations who you might never have met decided to sign a secret alliance against you, just in case!

In other words, a sign from others that you are doing too well!
 

Hitman928

Diamond Member
Apr 15, 2012
6,332
11,189
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TSMC's 4nm Arizona fab is up and running earlier than expected and is already producing chips for Apple and production for AMD is scheduled to begin shortly. Critically, the AZ fab was not only able to match, but actually slightly exceed the yields seen at comparable fabs in Taiwan (4% better).

 

poke01

Platinum Member
Mar 8, 2022
2,352
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More crap from MLID. Apple would never buy Intel for its fabs now. They got TSMC fabs in the US.
Samsung can never buy Intel as the US would stop the merger.
 

jdubs03

Senior member
Oct 1, 2013
951
594
136

More crap from MLID. Apple would never buy Intel for its fabs now. They got TSMC fabs in the US.
Samsung can never buy Intel as the US would stop the merger.
It’s a shame that they’re not leading edge. Though if I recall, I heard that their next construction in Arizona will be. I think that’s right?
 

Doug S

Platinum Member
Feb 8, 2020
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Word. Not suitable for Apple’s latest and greatest, but I’m sure Nvidia wouldn’t mind there.

Apple will at least have some SoCs made in the USA, both the iPhone 14 and iPhone 15 are still being sold and use N5 family SoCs. By the time iPhone 15 drops off the price list in two years they'll be making N3 family stuff here which will cover iPhone 16 and iPhone 17. Same for some of the older Macs that are still sold at a lower price even when a newer model is introduced.

Soon they'll be making their own modems too and I doubt those will be made in most leading edge process available (the ones they buy from Qualcomm aren't either) unless/until they integrate them onto the SoC. So I wouldn't be surprised if 100% of those are made in TSMC Arizona.
 
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