Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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Last edited:

Kepler_L2

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Sep 6, 2020
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Cypress Cove: 18%
Willow Cove: 0%
Golden Cove: 19%
Redwood Cove: 0%(arguably minus)
Lion Cove: ~10%

Based on this trajectory Cougar Cove is the 0% shrink and Panther Cove is maybe 10%.

Do you know Exist is saying that 20A was so bad that it would have resulted in a worse Arrowlake?
AFAIK 20A ARL-S samples had an FMax of 5.0 GHz.
 
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Philste

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Oct 13, 2023
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Gelsinger started his return to Intel beginning of February 2021. That is 3.5 years before arrow lake launch.
Might still be too late to radically change arrow lake, but certainly enough time to influence it.
Don't forget how crappy Intels execution was/is. MTL and ARL are both a year late. MTL Tape in was in 1H 21 (official Twitter Post by Intel) and tape out around Alder Lake Launch in September 2021. ARL is MTL with new Core Archs on the Compute Tile. So yeah, Pat didn't have much influence on that one.
 
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511

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Jul 12, 2024
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Don't forget how crappy Intels execution was/is. MTL and ARL are both a year late. MTL Tape in was in 1H 21 (official Twitter Post by Intel) and tape out around Alder Lake Launch in September 2021. ARL is MTL with new Core Archs on the Compute Tile. So yeah, Pat didn't have much influence on that one.
Its become better not that good vs AMD/Nvidia though PTL/Clearwater seems healthy but we will see how it turns out 12Xe3 should be good and Darkmont without ARL Issue

It's surprising how uncore is messing the Cores along with slow L3
 

gaav87

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Apr 27, 2024
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Its become better not that good vs AMD/Nvidia though PTL/Clearwater seems healthy but we will see how it turns out 12Xe3 should be good and Darkmont without ARL Issue

It's surprising how uncore is messing the Cores along with slow L3
Idk from the kernel driver access i have xe3_lpg has same MOCS table's as xe2_lpg. So same cache and memory guess no gddr7 for celestial. My guess they just increased core count per slice vs xe2.
 

cannedlake240

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Jul 4, 2024
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View attachment 110391

Above picture said a thousand words:- 20A version of Arrow Lake is on track for H2'24.... Pat either don't know what the true progress of 20A is or simply promised something he knew won't be coming. I let you guys be a judge
They know cancelling nodes absolutely won't help improve their fabs reputation. So it was more of a financial decision. Even if the yields weren't up to hvm standards they'd still do a paper launch as a tiny portion of the whole ARL supply.
 

Meteor Late

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Dec 15, 2023
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Diamond uses Panther cove which is an update over Cougar Cove which itself is update over Lion Cove

TSMC Nodes aren't easy to work with at High voltage
View attachment 110382

This is the first iteration of TSMC 3nm, N3B, the worst performing version of their 3nm. Please tell me what was the performance of Intel's first iteration of 14nm, 10nm, Intel 4?
I mean, it sounds great seeing how high Intel chips can get to clock, until you realize how many refinements their node needs to do so.
 
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IEC

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Jun 10, 2004
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Roman heats up some Arrow Lake chips above 160C to melt some indium solder and delid chips:

Delidding tools seem to cost $arm and $leg due to 90 Euro cost of just the heating/temp sensor element alone so probably not worth it especially given the cooling doesn't seem to significantly limit OC potential.

Doing the old mechanical fatigue method apparently leads to dead chips. Thus the need to melt the indium solder to minimize the mechanical stress.
 

cebri1

Senior member
Jun 13, 2019
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Roman heats up some Arrow Lake chips above 160C to melt some indium solder and delid chips:

Delidding tools seem to cost $arm and $leg due to 90 Euro cost of just the heating/temp sensor element alone so probably not worth it especially given the cooling doesn't seem to significantly limit OC potential.

Doing the old mechanical fatigue method apparently leads to dead chips. Thus the need to melt the indium solder to minimize the mechanical stress.
Deliding reduces temps by 20C :O

Edit: WTF
 
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