Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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Kosusko

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Nov 10, 2019
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Why are Intel CPUs lagging behind in gaming? Analysis of the reasons for the decline in Core Ultra gaming performance
source:
https://www.bilibili.com/video/BV1tW14YGEmz/

From 03:41 there is e.g. also a comparison of the Intel Core Ultra 9 285K processor configuration 8P + 16E vs 1P + 16E, while there are actually interesting FPS and power consumption results... 🧐

Furthermore, if I understood it correctly, 17 cores, ie 1P + 16E gives a score of 31.159 pts in Cinebench R23.
 
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Hulk

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Oct 9, 1999
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Did some quick calcs using the ARL die shot. I don't have a scale so I can only do size comparisons. Anyway, some facts for our discussions.

Skymont cluster looks to be 29% larger than a single Lion Cove, both including L3 cache. Or put another way Lion Cove is 77% the size of a Skymont Cluster.

For the same area with a P clock of 5.4 and E clock of 4.6, Skymont produces 2.3x the CB R24 MT score as Lion Cove.

That is 388 points for a Skymont cluster and 1.29x130=167 points for Lion Cove of equal area.

Skymont does fulfill Intel's promise of E core MT area compute efficiency but unfortunately Lion Cove is somewhat letting down the compute complex currently in some applications.
 

cannedlake240

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Jul 4, 2024
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Based on results, even Skymont is far behind competition. ARM is just steamrolling over it. Lunarlake is just ok.
Because it wasn't designed with the targets and the mindset of beating those top end designs? And it's a higher clocking core than most of these Arm mobile architectures. M4 P core is ~3mm2 on similar process, considerably larger and has access to 4x larger caches with similar latency.
So 20A is essentially at best a 10nm node used in Cannonlake.
Lol what? That node couldn't even reach 3.5Ghz let alone 5Ghz
 

cebri1

Senior member
Jun 13, 2019
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That's when it goes smoothly. Didn't SPR development start in 2017? It took 6 years... MTL was probably similar but at a smaller scale, 7nm, design etc issues. Also isn't that pic for the dev cycle of Raptor which is just Alder++. Something like MTL will likely take longer
It’s not only that, a new CEO doesn’t order a new design the first day he arrives. There are a lot of projects already ongoing over which you have limited influence. I doubt Pat started implementing his plans until 6-9 months after his arrival. Anything on 18A is Pat, right now we’ll see how the tech evolves but the right culture doesn’t seem to be there yet.
 
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Meteor Late

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Dec 15, 2023
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Because it wasn't designed with the targets and the mindset of beating those top end designs? And it's a higher clocking core than most of these Arm mobile architectures. M4 P core is ~3mm2 on similar process, considerably larger and has access to 4x larger caches with similar latency.

Lol what? That node couldn't even reach 3.5Ghz let alone 5Ghz

You are doing the wrong comparisons, for example, you can compare Skymont with Oryon M, go check Spec2017 curves from Geekerwan. It's performing better than Skymont in both int and fp, but especially in fp the difference is huge, and it's smaller, I think Skymont is around 1.15 mm2 without L2 while Oryon M is at around 0.9 mm2 without L2.
 

GTracing

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Aug 6, 2021
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You are doing the wrong comparisons, for example, you can compare Skymont with Oryon M, go check Spec2017 curves from Geekerwan. It's performing better than Skymont in both int and fp, but especially in fp the difference is huge, and it's smaller, I think Skymont is around 1.15 mm2 without L2 while Oryon M is at around 0.9 mm2 without L2.
If you're talking about his 8 Elite video and his Lunar Lake video, the two videos shouldn't be compared against each other. All the CPUs in the 8 Elite video score way higher in spec 2017 fp.
 

OneEng2

Member
Sep 19, 2022
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You have NO idea what are you talking about. There are three types of threads:

1st thread on P core,
thread on E core
2nd thread on P core.

These threads are utilised in this order, as the thread count of the load increases.

If you have 8 thread load, all these threads will be on P cores.

Each thread above 8 will be placed on E core.

Only after you run out of unutilised cores, the second threads on P cores will be utilised.

For example for 14700K, CPU with loads with 20 and less threads will perform exactly the same whether the HT is on or off. Only the extreme 28 thread loads will utilise HT and will improve performance of these loads by about 10%.

HT is not needed anymore for normal consumer workloads.
SMT is a very space efficient way to get more MT performance from the same superscalar processor since it utilize unused execution units that would otherwise have just been doing nothing when ILP is low (most of the time).

You are asserting that MT performance is unimportant in "consumer workloads". I disagree.
Yet Lion Cove is still bigger than a Zen 5 core!
N3B is slightly better performance-power wise than N4P, at least in the low to mid curve. I've seen power numbers with Spec and yeah even at lower frequencies this thing is not good at all.
... and Lion Cove is on a more dense/better process node than Zen 5. Lion Cove also lacks AVX512... and SMT.... which is quite puzzling. How can it have so much going for it and be larger and less performant than Zen 5.
I'm not so sure about that. If my measurements are correct Zen 5C on N3E is about the same size as Skymont on N3B but it has SMT too which helps quite a lot in certain workloads. So it seems to waste less die space than letting Intel design a CPU core.
I thought that Skymont was smaller than Zen 5c by a pretty good margin?
If this was true, all the productivity benchmarks wouldn't scale in performance from, say a 9900X to 9950X (i.e 24 to 32 threads) now wouldn't it, so with the current Core/thread count(s) on client at least it absolutely is not useless.
Agree. Additionally, as time goes on, MT will become more and more important.
That's for Turin Dense right?

I'm getting 1.9mm2 without the L2 cache using SP5 package size which is 75.4mm x 72mm. That's bigger than Skymont with 1MB L2. Without it, it's 1.15mm2.
So what are your calculations for:

1) Skymont
2) Zen 5c on N4P
3) Zen 5c on N3E
So they dropped HT in consumer Arrow Lake to dial back power consumption?
I don't think so. Everything I have ever read for the last 3 decades indicates that SMT improves overall performance/power. I am guessing it was die size.
This is the first iteration of TSMC 3nm, N3B, the worst performing version of their 3nm. Please tell me what was the performance of Intel's first iteration of 14nm, 10nm, Intel 4?
I mean, it sounds great seeing how high Intel chips can get to clock, until you realize how many refinements their node needs to do so.
No matter how crazy you get analyzing the situation, Lion Cove is larger, and on a more advanced node than Zen 5 desktop. Add to this the fact that N3B was the MOST DENSE version of TSMC N3 node (and also the most expensive). N3B also offers better PPC than N4P albeit not tons (<10% IIRC). Still .... that isn't "nothin"
Read my lips.
"5 nodes in 4 years."
When I read those lips, all I hear is "Oh My GOD this is risky ...... and expensive".
There is something worth considering when comparing the 285K to the 14900K and that is cooling. Without a good sample, a fair bit of tuning, and a good cooling solution (think AIO 360) you are not going to get 5.5GHz all-core out of a 14900K under heavy load, which of course is when you need that frequency. A 14900K at stock settings from the VID table programmed into the average 14900K you're looking at around 5GHz and 225W.

If on the other hand a 285K at 225W can maintain 5.4GHz with air cooling then ARL now has the IPC and the frequency advantage over Raptor Lake. Yes, I understand that gaming presents a more bursty and less all-core intensive load so the 14900K will probably still be on top but if all you are looking for is productivity then ARL could be a good solution.

Then again there is that pesky 9950X that is as fast or faster in many applications and even more efficient.

My point is that in the real world the 285K looks to be a big step up. Again, Intel created all of this nonsense over the last few years by pushing Raptor into supernova energy territory.
... and THIS is the most important thing for Intel right now IMO. If they are to have any hope of catching up to AMD in the DC (where the majority of the growth AND profits are), they have to get a handle on their performance/power.

Also, it was an important step for Intel to establish "tiles". I feel like they made a lot of advancement with Arrow Lake, but most of the advances they made aren't going to pay off for a couple of years.
 
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511

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Jul 12, 2024
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I'm not so sure about that. If my measurements are correct Zen 5C on N3E is about the same size as Skymont on N3B but it has SMT too which helps quite a lot in certain workloads. So it seems to waste less die space than letting Intel design a CPU core.
Can you share your measurements also you forgot the most important part Node libraries 5C is HD Libraries with finflex it can skew the results if cores are not using the same libraries Skymont will be HP like they have been using it someone need to perform SEM analysis on it
 

cannedlake240

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Jul 4, 2024
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Can you share your measurements also you forgot the most important part Node libraries 5C is HD Libraries with finflex it can skew the results if cores are not using the same libraries Skymont will be HP like they have been using it someone need to perform SEM analysis on it
Z5C Turin variant with the big fpu is probably larger than skt, clockspeed target is different too
 
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DavidC1

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Dec 29, 2023
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GNR on a 2019 roadmap. maybe it's Pat's fault too. But probably people in this forum can do a turnaround of a company with a broken culture and 140K people easily, maybe they should sign up for the job.
You don't need to know the company inside out to know there's something wrong with it.

And yes their broken culture and spirit of making teams fight each other is unlike turning around AMD, which didn't have such issues. Intel is riddled with bureaucracy and other issues that can't be easily fixed. The company will have to be gutted and rebuilt in order to fix it. I mean rebuilding such as replacing 50%+ of employees.

But yes Pat made mistakes, and not small ones at that.
Lol what? That node couldn't even reach 3.5Ghz let alone 5Ghz
Read my comment again, and come back to me.
So what are your calculations for:

1) Skymont
2) Zen 5c on N4P
3) Zen 5c on N3E
I already answered 1 and 3 in the comment you quoted. 2 is only slightly larger than 3.
You are doing the wrong comparisons, for example, you can compare Skymont with Oryon M, go check Spec2017 curves from Geekerwan.
Lunarlake's Skymont is crippled by the lack of fast L3 cache. There's 10-20% difference on average.
 

511

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Jul 12, 2024
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You don't need to know the company inside out to know there's something wrong with it.

And yes their broken culture and spirit of making teams fight each other is unlike turning around AMD, which didn't have such issues. Intel is riddled with bureaucracy and other issues that can't be easily fixed. The company will have to be gutted and rebuilt in order to fix it. I mean rebuilding such as replacing 50%+ of employees.
Its a mess of a culture also Who to gut and who to keep in 100k people is tough job they need a huge restructuring and rebuilt like AMD did need to lay off some high rankiy VPs
But yes Pat made mistakes, and not small ones at that.
Biggest mistakes not killing the dividends after a year of joining
 

DavidC1

Golden Member
Dec 29, 2023
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What's up with all the reviews from every country not doing P vs E perf/clock comparisons? They all seem like a copy of each other just in a different language, and starting with repeating what Intel slides say. Are they not curious?
Biggest mistakes not killing the dividends after a year of joining
He overinvested heavily. It's not just dividends. Things that they said were gonna cut in 2023-2024 they should have cut soon as he joined Intel in 2021-2022. Then they would have had more cash to play with.
-Keep Falcon Shores CPU/GPU
-Get rid of Rialto Bridge
-Cut 20A and focus on 18A
-dGPU downsizing(they are doing it anyway)
-Fab efficiencies, like Hot Lots
-Selling Optane, Altera, spinning off MobilEye

All done before 2022 ended. Basically same thing they are doing now but during a period of when they had good sales numbers. Except for Falcon Shores decision. It was a mistake. AMD is making good money off MI300.

The short-sightedness of the decision is why I said he sounds a bit like a Trojan Horse.
 
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511

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Jul 12, 2024
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What's up with all the reviews from every country not doing P vs E perf/clock comparisons? They all seem like a copy of each other just in a different language, and starting with repeating what Intel slides say. Are they not curious?
Yes i want in depth review with updated bios and windows patch i want to see is it really a flaw in design or is it scheduling Bugs too bad we can't do 0+16 or 8+0 comparison
He overinvested heavily. It's not just dividends. Things that they said were gonna cut in 2023-2024 they should have cut soon as he joined Intel in 2021-2022. Then they would have had more cash to play with.
-Keep Falcon Shores CPU/GPU
-Get rid of Rialto Bridge
-Cut 20A and focus on 18A
-dGPU downsizing(they are doing it anyway)
-Fab efficiencies, like Hot Lots
-Selling Optane, Altera, spinning off MobilEye
He took his time but time is not in their side don't forget the buisness he axed i have a soft spot for Optane i was sad
All done before 2022 ended. Basically same thing they are doing now but during a period of when they had good sales numbers. Except for Falcon Shores decision. It was a mistake. AMD is making good money off MI300.

The short-sightedness of the decision is why I said he sounds a bit like a Trojan Horse.
Oh yes Falcon shores should have been accelerated when they axed rialto
 

Kocicak

Golden Member
Jan 17, 2019
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SMT is a very space efficient way to get more MT performance from the same superscalar processor since it utilize unused execution units that would otherwise have just been doing nothing when ILP is low (most of the time).

You are asserting that MT performance is unimportant in "consumer workloads". I disagree.
You wrote a theoretical statement and what you disagree with what I wrote, without even a single reason why.

Can you find even ONE heavy MT consumer application? I am not talking about professional video production software, scientific calculation/simulation apps etc.

And if you can find such an app, can you run it with and without HT, compare the results and in a realistic use scenario explain how does this difference matter to the consumer?

We are talking about current Intel consumer CPUs, which have at least 12 physical cores even in lower price category.

So cut the theoretical fluff, and talk facts:

CPU used - current Intel with at least 12 cores:
Application used:
HT benefit:
Typical workload size:
Average time spared by using HT:
Use scenario - how many times a month is such a workload processed:
Benefit to the consumer - time spared per month:
How does this benefit the customer?
Can he even notice?
How does this saved time compare to the time wasted by different unproductive activities during the month?
 
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How does this saved time compare to the time wasted by different unproductive activities during the month?
Do you realize the difference between "time wasted for fun" and time spent waiting for a critical task to finish? Most humans on the planet do not like waiting for a work related process to finish so they can spend time wasting on what they love to do.
 
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