Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

Golden Member
Mar 3, 2017
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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.




Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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RTX

Member
Nov 5, 2020
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.. and not a trivial one either. 9% density improvement in a tweaked N3 process. Low risk, high yield, what's not to like?

I wonder if the price will be the same or lower than N3E/N3P?

Pretty good business model TSMC has going for it. They keep improving the capabilities of their older equipment in parallel with developing new equipment processes for the generational increase.

I suspect it lets them continue to charge more premium prices on older equipment even when new equipment is introduced. Helps pay off that God awful initial cost of new equipment in Lithography these days.
N3X can also improves power reduction by lowering supply voltage, customers have the flexibility to use these methods to enhance competitiveness of product design. N3X will be in production in 2025.
N3X designs can be lower power in addition to reduced area vs N3P.
 
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jdubs03

Senior member
Oct 1, 2013
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At the same speed only.
View attachment 110388
Both N3X and N2 going into mass production at the same time [2025H2].
Then next year N2P and A16 are also going into mass production at the same time.

Seems TSMC customers have a lot of choice.
I’d be surprised if Apple doesn’t use N2 next year, I know the rumors are that they’re supposed to be N3P.

7.5% less power draw compared to 27.5% less.
Or
5% performance increase compared to 12.5% more performance.
and 15% denser.

If both are expected to be HVM in H2 2025. I don’t see why Apple would compromise on a weaker process. They always pay for the best.
 

FlameTail

Diamond Member
Dec 15, 2021
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I’d be surprised if Apple doesn’t use N2 next year, I know the rumors are that they’re supposed to be N3P.

7.5% less power draw compared to 27.5% less.
Or
5% performance increase compared to 12.5% more performance.
and 15% denser.

If both are expected to be HVM in H2 2025. I don’t see why Apple would compromise on a weaker process. They always pay for the best.
The consensus is that N2 HVM in H2 2025 is too late for iPhone 17 series (September 2025).

N3E HVM started in 2023Q4, and Apple shipped a product made on it 5 months later in May of 2024- the iPad Pro with M4. Compared to the iPhones, the iPad is a much lower volume product.

Maybe we might see N2 in Apple M5 Macs (November 2025?).
 
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Doug S

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Feb 8, 2020
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The consensus is that N2 HVM in H2 2025 is too late for iPhone 17 series (September 2025).

N3E HVM started in 2023Q4, and Apple shipped a product made on it 5 months later in May of 2024- the iPad Pro with M4. Compared to the iPhones, the iPad is a much lower volume product.

Maybe we might see N2 in Apple M5 Macs (November 2025?).

I don't know. If "H2 2025" means the same as "H2 2022" and "H2 2023" meant for N3B & N3E respectively, then yeah. Both entered mass production in mid/late December - probably just to tick a box in N3B's case so TSMC could claim they kept the timeframe they'd committed to since there were no known products using N3B shipping until Sept 2023.

We know that N2 reached target yield for risk (80%) in late May, and formally entered risk production in the first week of July, so one "H2" is not like the others. TSMC typically is in risk production about a year, which would allow them to enter mass production around June 2025. Which is too late for iPhone 17.

Keep in mind though, TSMC's "mass production" is an arbitrary target of 90% yield. That's what they commit to deliver to customers, so that when customers buy wafers they can model how many good dies they'll get based on their die size and ability to tolerate defects (via redundant structures and/or binning parts with fewer working cores, less cache or whatever)

So what happens if you have a customer who because they prepaid a couple years ago is first in line for a new process and they say "we're OK with it if the yield isn't quite 90% when you start delivering wafers" so maybe they enter mass production three months earlier when the yields are only 87 or 88% but still on target to reach 90% by June? If you're TSMC you say "OK we'll informally start mass production of your wafers March, and you accept the risk that the yields may not meet our normal standard of mass production quality" and bingo A19P ships in iPhone 17 Pro/Max in September and M5 follows in October/November made on N2.

I'm not saying that WILL happen, I'm saying that it could happen and knowing what we know today (what I have mentioned above about the risk production dates and TSMC indicating N2 is progressing very well) and assuming we don't later hear some news of bumps in the N2 road if I had to bet today I would bet Apple ships N2 based iPhones next year. And if that happens, I'd say there's an almost 100% chance that Apple will ship A16 based iPhones the year after that.
 

Executor_

Junior Member
Mar 4, 2010
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I don't know. If "H2 2025" means the same as "H2 2022" and "H2 2023" meant for N3B & N3E respectively, then yeah. Both entered mass production in mid/late December - probably just to tick a box in N3B's case so TSMC could claim they kept the timeframe they'd committed to since there were no known products using N3B shipping until Sept 2023.
Keep in mind though, TSMC's "mass production" is an arbitrary target of 90% yield. That's what they commit to deliver to customers, so that when customers buy wafers they can model how many good dies they'll get based on their die size and ability to tolerate defects (via redundant structures and/or binning parts with fewer working cores, less cache or whatever)

N3B went into mass production in December 2022. You state that mass production = 90% yield. Would TSMC have amended their contract with Apple to known-good-dies if that was truly the case?
 

Doug S

Platinum Member
Feb 8, 2020
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N3B went into mass production in December 2022. You state that mass production = 90% yield. Would TSMC have amended their contract with Apple to known-good-dies if that was truly the case?

N3B was a special case, it was widely rumored even before it entered risk production that was it was a very problematic node, and TSMC was not making their usual claims about how it progressing well and showing off graphs comparing its yield at various stages to previous processes like they had with N5.

It obviously entered mass production not only well below the mass production threshold but well below the risk production threshold. We don't know the exact terms of TSMC's contract with Apple when Apple prepurchases a massive number of wafers, but presumably TSMC was on the hook to deliver Apple a mass quantity of 'N3' wafers to allow them to ship iPhone 15 Pro/Max in Sept 2023.

As Apple was the only known customer for N3B until Intel recently started taking N3B wafers (perhaps not coincidentally right when Apple's demand for N3B wafers dropped precipitously) they knew they had to be in mass production in time for that, ready or not. Presumably somewhere along the way Apple demanded some sort of discount for TSMC not meeting their mass production yield standards and KGD is what was agreed upon.

If you look at the graphs TSMC has produced in the past showing the yields you can see their targets - and actually now that I see them again they've started mass production below 90% with N7 and N10 it appears, which may have had something to do with the product schedule of their largest customer...


 

oak8292

Member
Sep 14, 2016
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If you go back far enough to the spat that Nvidia had with TSMC on the 28 nm it was reported that TSMC shares wafer costs with the customer until a contractual yield is achieved on a new node and then the customer pays for wafers. Nvidia had a long and difficult start up and complained that TSMC was too expensive and 28 nm would be the last economic node.

Obviously things have changed for both Nvidia and TSMC. TSMC has more appropriate ramp customers with small die that ramp faster with better yields. Nvidia trails with a much better chance of yield for large die. When there are problems Nvidia knows the process works and TSMC can help them get appropriate guard bands or whatever just went wrong at Nvidia.

"We had a design flaw in Blackwell," Huang said. "It was functional, but the design flaw caused the yield to be low. It was 100% Nvidia's fault."

 

DavidC1

Golden Member
Dec 29, 2023
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At the same speed only.
View attachment 110388
Look how sad those numbers are. New nodes used to give 2x density, almost as a given.

15%? 10%? 7%? This is in the level of within a node improvements now. N3P was 4% over N3E, and N3X is 10% over N3P.

And to get those pathetic gains they need to do a LOT more now, such as BSPDN, nanowires, etc. By the way, Intel gives same pathetic numbers. 30% density over Intel 3 for 18A, and for 14A, it's 20% density over 18A. It looks better than TSMC, but they are behind, so it doesn't look too good.
 
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