Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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MoistOintment

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I'm looking forward to someone taking ARL-H, disabling cores until it's 4+4, normalizing clockspeeds, and then comparing it vs LNL to see what kind of impact the SoC design is having on performance, especially in the apps/games that are seeing the largest regressions. Maybe even doing a 4+0 to account for the on/off ring differences with the E cores.

Should give us a better idea of what's LNC's fault and what's the SoC designs fault.
 

controlflow

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Feb 17, 2015
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285K performance in games from using CUDIMMs as well as boosting cache and E core clocks. Pretty big differences.

Obviously memory latency is a clear issue in ARL but the fact that E core overclocking also yields big gaming performance improvements still makes me think that threads are ending up on the E cores sometimes when they probably should be running on the P cores.
 

Hitman928

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285K performance in games from using CUDIMMs as well as boosting cache and E core clocks. Pretty big differences.

Obviously memory latency is a clear issue in ARL but the fact that E core overclocking also yields big gaming performance improvements still makes me think that threads are ending up on the E cores sometimes when they probably should be running on the P cores.

I'm guessing the cache overclock is doing the heavy lifting there, not the E-core overclock but we'd need to see them tested separately to be sure. The only person I've really seen testing for scheduling issues is capframex (not my favorite source, but it's all I've got so far) who seems to have come to the conclusion that scheduling isn't the issue.
 

poke01

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Mar 8, 2022
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285K performance in games from using CUDIMMs as well as boosting cache and E core clocks. Pretty big differences.

Obviously memory latency is a clear issue in ARL but the fact that E core overclocking also yields big gaming performance improvements still makes me think that threads are ending up on the E cores sometimes when they probably should be running on the P cores.
Looks like RAM speed/bandwidth does play a role in CB2024.


There is also an increase in R23 but less so using better memory.


MT in both CB2024 and R23 showed the biggest difference thanks to the overclock
 
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controlflow

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I'm guessing the cache overclock is doing the heavy lifting there, not the E-core overclock but we'd need to see them tested separately to be sure. The only person I've really seen testing for scheduling issues is capframex (not my favorite source, but it's all I've got so far) who seems to have come to the conclusion that scheduling isn't the issue.
What is the base cache frequency, 3.9 or 4.0 ? Seems like a pretty mild overclock of the cache.
 

Hitman928

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Apr 15, 2012
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Isn't overclocking the cache a pretty risky thing, as in quicker degradation and errors in less than 5 years?

Quicker degradation? Sure. Within a meaningful timeline? No idea. If it were my chip, I'd be a little wary of doing it given RPL's issues, but it might not be an issue with a moderate overclock.
 

lopri

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Jul 27, 2002
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I hear the inconsistent performance issue has to do with the cores' physical location/distance from the SOC and resulting latency. The unconventional layout (PP-EEEEEEEE-PPPP-EEEEEEEE-PP) is causing unexpected slowdowns, and in certain scenarios using close E cores is faster than faraway P cores. (!)
 
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DavidC1

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Dec 29, 2023
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3.6 GHz, so it's a 14% overclock.
Ring is 3.8GHz not 3.6GHz.
I hear the inconsistent performance issue has to do with the cores' physical location/distance from the SOC and resulting latency.
The inconsistent performance is due to losing all people that mattered because of the hellish landscape of working at Intel coupled with threats of layoffs and "juicy" voluntary separation packages which all does is drain the ones with some sense.
Isn't overclocking the cache a pretty risky thing, as in quicker degradation and errors in less than 5 years?
Caches are uniform and simple, it's the fabric itself that's hard to clock.

This is why I keep saying, the mini-Netburst era needs to go away, both at AMD and Intel. Back down on the ridiculous clocks, get rid of the uop cache since now they have an alternative that's more efficient.
 
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DavidC1

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He took his time but time is not in their side don't forget the buisness he axed i have a soft spot for Optane i was sad
In general I agree with Grove and Gelsinger that they "never want to be in memory". Remember Intel was in the memory business, and transferring that to CPU was the big thing Grove did.

Optane was poorly executed. Rather than doing caching as with Optane "Memory" they should have made it live up to the name and brought the enterprise Memory Drive feature so it could have been Slow Memory.

This is the problem with Intel. They were charging like $600 for Memory Drive. They likely didn't have it for client because Intel is an MBA company with engineers as a bonus.

The software part of Optane Memory was trash. If it got screwed up, your computer wouldn't boot. How can a company that were in the PC business for 50+ years don't see that as a problem is beyond me.

With the Memory Drive feature on client Optane Memory would have more justified it's price. And future client iterations would have brought PMEM. And another thing is they should have worked with AMD so they could adopt it easily.
 

poke01

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Here is another kicker Apple beat Intel to include proper Thunderbolt 5 on desktop today and most likely tomorrow on a laptop. The full spec 120GB/s.

What IS Intel doing? They used to be at the fore front of USB/thunderbolt standards. You can tell Arrow lake was delayed by the fact it does not support TB5.
There is a Razer Balde that supports TB5 but thats only on 1 port @ 80GB/s. The Razer laptop just use a discrete chip, Barlow ridge and unlike TB4 its not baked in.

The fact that Intel had anewsroom release about this 1 year ago and Apple already implemented it this year into their SoCs but Intel hasn't shows far delayed their team is.

Panther Lake better include builtin TB5, its great for SSDs, monitors and eGPUs.

EDIT:
You can get TB5 expansion cards on desktop though thanks to Barlow ridge. Nova Lake should definitely include TB5 by default.
 
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Hulk

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Looks like RAM speed/bandwidth does play a role in CB2024.
View attachment 110536

There is also an increase in R23 but less so using better memory.
View attachment 110537

MT in both CB2024 and R23 showed the biggest difference thanks to the overclock
I'm sorry but I'm not following. For ST result there seems to be no change when increasing L3 ring frequency. Small increase increasing memory from ? to 8400?

Statistically insignificant change in MT score.
 

controlflow

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Feb 17, 2015
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Here is another kicker Apple beat Intel to include proper Thunderbolt 5 on desktop today and most likely tomorrow on a laptop. The full spec 120GB/s.

What IS Intel doing? They used to be at the fore front of USB/thunderbolt standards. You can tell Arrow lake was delayed by the fact it does not support TB5.
There is a Razer Balde that supports TB5 but thats only on 1 port @ 80GB/s. The Razer laptop just use a discrete chip, Barlow ridge and unlike TB4 its not baked in.

The fact that Intel had anewsroom release about this 1 year ago and Apple already implemented it this year into their SoCs but Intel hasn't shows far delayed their team is.

Panther Lake better include TB5, its great for SSDs, monitors and eGPUs


Asus Z890 ProArt claims to have 120 Gbps TB5. I'm not sure if its actually for sale yet though.
 

DavidC1

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Dec 29, 2023
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Here is another kicker Apple beat Intel to include proper Thunderbolt 5 on desktop today and most likely tomorrow on a laptop. The full spec 120GB/s.

What IS Intel doing? They used to be at the fore front of USB/thunderbolt standards. You can tell Arrow lake was delayed by the fact it does not support TB5.
Intel never had TB in desktop dies. It is in mobile dies though. Early specs had TB4 support for desktop but it's probably a discrete chip.

But yea, Intel used to head memory standards and IO support. The fact that they lost that to AMD in 2019 or so tells us how badly they have fallen.
 

poke01

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Mar 8, 2022
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Asus Z890 ProArt claims to have 120 Gbps TB5. I'm not sure if its actually for sale yet though.
Nice find.
The thunderbolt 5 will likely be discrete and go through the chipset but integrated on the board. You would have to deal with DP in and what not.
Intel never had TB in desktop dies. It is in mobile dies though. Early specs had TB4 support for desktop but it's probably a discrete chip.
With Arrow Lake TB4 support should be in the I/O tile even on desktop.

 
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DavidC1

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Nice find.
The thunderbolt 5 will likely be discrete and go through the chipset, albeit integrated on board. You would have to deal with DP in and what not.

With Arrow Lake TB4 support should be in the I/O tile even on desktop.
You are right. I keep forgetting that we're in the "chiplet era".

@FlameTail says the 10P+4E M4 Pro is going to beat 9950X and 285K in Cinebench.

Yea... it's bad.

To give you an idea of how much x86 vendors are fumbling, Zen 5 and Lion Cove is roughly around Cortex X3 level. But there's Cortex X4, and Cortex X925, and there's ARM cores, plus the power usage.

If the E core team pulls a rabbit out of their hat and Arctic Wolf is 50% faster in Integer performance per clock, then it might be equal to I don't know, M3?
 
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DavidC1

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No, I said M4 Max might beat 9950X/285K in Cinebench 2024 MT.

M4 Pro can beat 9950X/285K in ST, but not MT.

M4 Max will be unveiled in the Apple event ~12 hours (?) from now.
Ok, but still.

-The first excuse was that ARM could never catch x86 cores even in per clock performance. Well, they did.
-The second excuse is that performance is perf/clock x clocks. Well, the M4 beats x86 processors in absolute ST performance.

We're at the third point now, which is MT performance against 200W+ processors. And I'm conveniently ignoring the much, much low power required to achieve that performance.

Like, slap Conroe vs Netburst comparison silly. Apple would have done to "Conroe" what Conroe was doing to Netburst. I knew after I got out of the silly x86 duopoly bubble mindset, after about Apple A8 I realized that what Intel achieved with Conroe/Merom would be blown away very soon.

The real truth is none of those excuses mattered, and it's simply Apple(and ARM in general) doing lot better in execution.
 

jdubs03

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Oct 1, 2013
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No, I said M4 Max might beat 9950X/285K in Cinebench 2024 MT.

M4 Pro can beat 9950X/285K in ST, but not MT.

M4 Max will be unveiled in the Apple event ~12 hours (?) from now.
Just to clarify. The M4 series will easily beat the ST performance of both the 285K/9950X (minimum 15% higher performance, with at least half the power draw).

Based on the slides provided today by Apple, the MT performance of the M4P is 2.1x the U7 258V. That’s a potential 21000 MT score in GB6. Almost catching both the 285K/9950X, again at way less power. I think the M4M has a real shot at pretty much destroying its competitors in MT, with far less power. It’s a theme.
 
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poke01

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The real truth is none of those excuses mattered, and it's simply Apple(and ARM in general) doing lot better in execution.
Its not because one has better engineers either. Intel has excellent teams bottled by horrible management. No company is perfect but investors will notice if you stuff up for multiple years and one day so will the US Gov but that is outside this thread scope.
 
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