According to the video, the base clock is 500Mhz higher and overclocking is enabled. The average gaming uplift was 8% so the MSRP hike (while not fun) makes sense.+200 MHz and +7% to MSRP, sad.
No meaningful frequency boost plus it's increased in price.
This could, in theory, allow Wafer on Wafer packaging, meaning much greater capacity to produce these chips in volume.
The claim is:
- 8% faster than 7800x3d
- 20% faster than Arrow Lake
Which sounds credible.
Now wondering if they could possibly have a united 3D V-Cache under both CCD's for the 9950X3D and 9900X3D, with direct L3 connect and bypassing the serial interconnect via the IOD die....
Now wondering if they could possibly have a united 3D V-Cache under both CCD's for the 9950X3D and 9900X3D, with direct L3 connect and bypassing the serial interconnect via the IOD die....
HU had 78X3D 20% faster than 285K already, but with a 4090. With those claim, how much of a boost can we expect out of a 4090? Do you guys think they've learned their lessons from the disastrous Zen 5 launch?
If they throw in the new v-cache stacking used on Zen 5.I heard an 8% performance increase over the 7800x3D. If that is correct, AMD could release a 7800x3D on N4P and it would be equal to the 9800x3D with nice efficiency gains as well. If they throw in the new v-cache stacking used on Zen 5. We could have an old 7800x3D being the king of gaming again. I know that is not what AMD wants but that is what it looks like on paper. N4P is good silicon and gives a nice efficiency gain and performance gains close to the performance difference between the 7800x3D and 9800x3D.
This is straight from TSMC.
N4P offers an 11% performance boost compared to N5 and entered risk production in July 2022. The N4 and N4P nodes are design rules-compatible with 5nm technology for easy design migration. The 5nm (N5) node is optimized for both mobile and High Performance Computing (HPC) applications.
This is non sensical. Zen 5 X3D absolutely has many architectural improvements over Zen 4 X3D. Just shrinking Zen 4 will not give you Zen 5 performance.I heard an 8% performance increase over the 7800x3D. If that is correct, AMD could release a 7800x3D on N4P and it would be equal to the 9800x3D with nice efficiency gains as well. If they throw in the new v-cache stacking used on Zen 5. We could have an old 7800x3D being the king of gaming again. I know that is not what AMD wants but that is what it looks like on paper. N4P is good silicon and gives a nice efficiency gain and performance gains close to the performance difference between the 7800x3D and 9800x3D.
This is straight from TSMC.
N4P offers an 11% performance boost compared to N5 and entered risk production in July 2022. The N4 and N4P nodes are design rules-compatible with 5nm technology for easy design migration. The 5nm (N5) node is optimized for both mobile and High Performance Computing (HPC) applications.
Yes, TSMC's performance statements aren't regarding designs already at the very edge of their process. Shrink a 5GHz design and you are not getting 5.5GHz. If you look into it TSMC are comparing a ~3GHz test chip.This is non sensical. Zen 5 X3D absolutely has many architectural improvements over Zen 4 X3D. Just shrinking Zen 4 will not give you Zen 5 performance.
The sram chiplet basically doubled in size (36mm² -> 70mm²). I can't imagine this only being due to more tsv's. I bet there's actually more than 64mb of cache on it if only to keep yields high. Maybe Turin-X will get some sku's with a bit more cache... maybe +96mb instead of +64mb.
Wafer on wafer packaging is probably more economical even with the extra 6nm die space. I can't imagine they would only do this for heat/power reasons...
Plus, TSMC's figure of +11% is for core logic performance. Whereas AMD's figure of +8% is for average frame-per-seconds of video game computer system performance.If you look into it TSMC are comparing a ~3GHz test chip.
Surely they have room now to migrate the entire L3 off the core die. Probably hedged this round by seeing if the cache-under layout worked. Expect Zen 6 to remedy this.It's not for heat/power reasons, it's so you can distribute the power and signals through the bottom die to the top. We'll have to wait and see on the L3 amount, but I'm pretty sure we have leaked screenshots and reports that the amount hasn't increased.
Sure, but why invest the resources when you already have the biggest stick you know. Does this really help compared to the engineering effort compared to say, improve the future IOD or work on other products. This X3D chips mitigates the need for faster RAM, it's already the fastest.Let's suppose it doesn't help in bandwidth. There's still the possibility of running the CUDIMM at lower latencies at 6400 MT/s, like CL26 or even lower. The stabilized signal integrity of CUDIMM should help there.
Depends on how much effort it is to enable CUDIMM support. I hope it's not a lot.Does this really help compared to the engineering effort compared to say, improve the future IOD or work on other products.
Why is this not possible with the current cores? If they use a single large V-cache die for 9900/9950X3D, I suppose it would only take a microcode update or a slightly updated stepping for all the cores to use the unified L3 cache and if that's too complex, how about the V-cache acting as a victim L4 cache for both CCD's L3 caches?So making a 16 core CCD basically? I don't think that's possible with the current cores
It's not for heat/power reasons, it's so you can distribute the power and signals through the bottom die to the top. We'll have to wait and see on the L3 amount, but I'm pretty sure we have leaked screenshots and reports that the amount hasn't increased.
I heard an 8% performance increase over the 7800x3D. If that is correct, AMD could release a 7800x3D on N4P and it would be equal to the 9800x3D with nice efficiency gains as well. If they throw in the new v-cache stacking used on Zen 5. We could have an old 7800x3D being the king of gaming again. I know that is not what AMD wants but that is what it looks like on paper. N4P is good silicon and gives a nice efficiency gain and performance gains close to the performance difference between the 7800x3D and 9800x3D.
This is straight from TSMC.
N4P offers an 11% performance boost compared to N5 and entered risk production in July 2022. The N4 and N4P nodes are design rules-compatible with 5nm technology for easy design migration. The 5nm (N5) node is optimized for both mobile and High Performance Computing (HPC) applications.
Process nodes don't work like that. You seem to be thinking that N4P gives you 11% frequenc boost at the very top - that would mean non-X3D Zen 4 being able to run at 6300 MHz (6450 MHz unofficial Fmax) and X3D Zen 4 at 5550 MHz (unofficial Fmax 5600-5650). That's obviously not happening.If they throw in the new v-cache stacking used on Zen 5.
This is hilarious.
Also keep in mind that when TSMC/Intel/Samsung list the benefits of a new node, it is never the performance and lower power consumption as well, it is one or the other. Either you get higher frequency (but not at the maximum end of the curve) at the same power, or you select the same frequency and then you end up with lower power.with nice efficiency gains as well
Just read what Intel entusiasts have posted with regards to CUDIMM in ARL topic, it's basically useless unless the delta is > 2000 MT/s and you need bandwidth, otherwise unbuffered DIMMs are better. Don't hype yourself needlessly.Depends on how much effort it is to enable CUDIMM support. I hope it's not a lot.
Surely they have room now to migrate the entire L3 off the core die. Probably hedged this round by seeing if the cache-under layout worked. Expect Zen 6 to remedy this.
Why is this not possible with the current cores? If they use a single large V-cache die for 9900/9950X3D, I suppose it would only take a microcode update or a slightly updated stepping for all the cores to use the unified L3 cache and if that's too complex, how about the V-cache acting as a victim L4 cache for both CCD's L3 caches?
No they tested 7800x3d vs 9800x3d with, a 7900xtx and 9800x3d vs 285k with 4090HU had 78X3D 20% faster than 285K already, but with a 4090. With those claim, how much of a boost can we expect out of a 4090? Do you guys think they've learned their lessons from the disastrous Zen 5 launch?
*edit: They tested with 4090 according to the end notes. If 78X3D was 20% faster than U9 285K, wouldn't that put it around the same performance as the 98X3D? Sounds very fishy to me!