Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

cannedlake240 · Nov 1, 2024

511 said:
N2P won't come until later half of 26 and only for apple it is 18A for majority and Graphics+IO will be TSMC

It might be the regular N2, but that'd make it even more pointless, unless 18A-P is significantly behind. The fact is Pat clearly admitted that a part of Nova will be external, which doesn't add to IFS poor reputation

H433x0n · Nov 1, 2024

Panther Lake is also partially external and it’s the lead client product for 18A.

By the time Nova Lake is out 18A will be mature and most likely better suited for a desktop chip where performance is a priority over N2 that has density and low power efficiency.

gdansk · Nov 1, 2024

H433x0n said:
Panther Lake is also partially external and it’s the lead client product for 18A.

By the time Nova Lake is out 18A will be mature and most likely better suited for a desktop chip where performance is a priority over N2 that has density and low power efficiency.

I like the sound of that

cannedlake240 · Nov 1, 2024

H433x0n said:
Panther Lake is also partially external and it’s the lead client product for 18A.

By the time Nova Lake is out 18A will be mature and most likely better suited for a desktop chip where performance is a priority over N2 that has density and low power efficiency.

Nah all PTL will have an 18A compute tile, whereas in Nova lake some compute tiles will be external

H433x0n · Nov 1, 2024

cannedlake240 said:
Nah all PTL will have an 18A compute tile, whereas in Nova lake some compute tiles will be external

Based on what? Is there some news that I missed?

cannedlake240 · Nov 1, 2024

H433x0n said:
Based on what? Is there some news that I missed?

Pats comments in the earnings call, plus rumors

controlflow · Nov 1, 2024

cannedlake240 said:
It might be the regular N2, but that'd make it even more pointless, unless 18A-P is significantly behind. The fact is Pat clearly admitted that a part of Nova will be external, which doesn't add to IFS poor reputation

cannedlake240 said:
Nah all PTL will have an 18A compute tile, whereas in Nova lake some compute tiles will be external

He did not say that and he certainly did not say anything about compute tiles being external. He more or less said that they are still looking into potentially having some tiles being external but was quite vague.

511 · Nov 1, 2024

Just an FYI from the call

https://twitter.com/x/status/1852109852492935265

cannedlake240 · Nov 1, 2024

controlflow said:
He did not say that and he certainly did not say anything about compute tiles being external. He more or less said that they are still looking into potentially having some tiles being external but was quite vague.

Idk reddit people are talking about some NVL "halo" top end part that'll utilize TSMC for the compute tile. That and Pats answer seems plausible

DavidC1 · Nov 1, 2024

511 said:
Cannon Lake level trash means barely yielding and 3ghz max it seems Tiger Lake level 🙂

We're in 2024, and 5GHz for a desktop part is not impressive on 19 stage pipeline x86.

Back then, they barely reached 5GHz. So it's CNL level trash. 8121U regressed in clocks from 3.4GHz to 3.2GHz.

A: Panther, some will be external, but most of the mm2 are internal, 70%+ silicon area is in-house. Nova Lake has some SKUs continuing to leverage external, but most internal. Still some flexibility, but most are committed to Intel foundry. Executing on bringing wafers on home.

Marketing can spin "silicon" area as including the Foveros tile and that's quite large. They did say Pantherlake is 18A, so if it's not then would be another fail.

Intel is still committed to Arc. Nothing changes today.

Hate all this marketing lies. ARC should mean dGPU. It's November and there isn't even a peep about Battlemage, so supposedly even the low end version that can only beat A770 may be next year.

Legally they are "committed" to ARC because they have a mobile iGPU part coming. Stop the BS. Say it's delayed.

511 · Nov 1, 2024

DavidC1 said:
We're in 2024, and 5GHz for a desktop part is not impressive on 19 stage pipeline x86.

Back then, they barely reached 5GHz. So it's CNL level trash. 8121U regressed in clocks from 3.4GHz to 3.2GHz.

It's not CNL level trash CNL was something else

DavidC1 said:
Marketing can spin "silicon" area as including the Foveros tile and that's quite large. They did say Pantherlake is 18A, so if it's not then would be another fail.

A spectacular fail if it would come to pass but they already have their A0 PTL

DavidC1 said:
Hate all this marketing lies. ARC should mean dGPU. It's November and there isn't even a peep about Battlemage, so supposedly even the low end version that can only beat A770 may be next year.

Legally they are "committed" to ARC because they have a mobile iGPU part coming. Stop the BS. Say it's delayed.

On this front i agree where is the dGPU lmao it was supposed to be Q4 not a single trace

DavidC1 · Nov 1, 2024

I translated a Japanese video on Youtube about Keller at Intel, Lunarlake and Arrowlake.

It says:
-Jim Keller never directly developed a core. He helped improve the flow of design and introduce better methodologies.
-Arrowlake was supposed to be earlier than Lunarlake, but it got delayed and they needed RPL-R. People say Arrowlake was still taking too long and Pat wanted it out.
-Lunarlake version of Lion Cove and Skymont has some advancements over Arrowlake(not the other way around). This is consistent with earlier leaks. In fact, it was said at AT forums that LNL cores have modifications over ARL cores.

511 said:
It's not CNL level trash CNL was something else

It may not be 4 years delayed, but it still sucks. The 18A that's coming late next year is the specs of the original 20A. Meteorlake's Intel 4 could do better at 5.1GHz, and that's a mobile part. They couldn't meet their own performance goals on 20A or 18A. If Broadcom could only get 20% yield rate with 18A, how bad do you think 20A was?

By the way some people are claiming Intel said both Skymont and the ring has 400-500MHz headroom because it's running at an efficient spot(this part doesn't make as much sense).

It may be relatively easy to get Arctic Wolf at 5GHz. Then it's game over for P.

coercitiv · Nov 1, 2024

DavidC1 said:
Arrowlake was supposed to be earlier than Lunarlake, but it got delayed and they needed RPL-R. People say Arrowlake was still taking too long and Pat wanted it out.

This sounds very likely given the issues we've been able to identify in ARL that are not present in LNL. In fact I dare say we suspected as much even before ADL was launched because LNL has a superior topology to both MTL and it's ARL sibling.

SiliconFly · Nov 1, 2024

DavidC1 said:
I translated a Japanese video on Youtube about Keller at Intel, Lunarlake and Arrowlake.

It says:
-Jim Keller never directly developed a core.

Are you sure?

So, all this MLID hoopla about Jim Keller's Royal Core is all nothing but imaginary bs?

adroc_thurston · Nov 1, 2024

SiliconFly said:
So, all this MLID hoopla about Jim Keller's Royal Core is all nothing but imaginary bs?

It is/was a real thing but not in a way he imagined it.

coercitiv · Nov 1, 2024

adroc_thurston said:
he imagined it.

there, nice and tidy.

DavidC1 · Nov 1, 2024

SiliconFly said:
Are you sure?

So, all this MLID hoopla about Jim Keller's Royal Core is all nothing but imaginary bs?

Royal Core was brought by engineers at Intel. Keller may have helped all the teams smooth development, but it's not his work.

Doesn't matter now. Royal Core engineers are gone at Intel.

511 · Nov 1, 2024

DavidC1 said:
I translated a Japanese video on Youtube about Keller at Intel, Lunarlake and Arrowlake.

It says:
-Jim Keller never directly developed a core. He helped improve the flow of design and introduce better methodologies.
-Arrowlake was supposed to be earlier than Lunarlake, but it got delayed and they needed RPL-R. People say Arrowlake was still taking too long and Pat wanted it out.
-Lunarlake version of Lion Cove and Skymont has some advancements over Arrowlake(not the other way around). This is consistent with earlier leaks. In fact, it was said at AT forums that LNL cores have modifications over ARL cores.

Link this video please

DavidC1 said:
It may not be 4 years delayed, but it still sucks. The 18A that's coming late next year is the specs of the original 20A. Meteorlake's Intel 4 could do better at 5.1GHz, and that's a mobile part. They couldn't meet their own performance goals on 20A or 18A. If Broadcom could only get 20% yield rate with 18A, how bad do you think 20A was?

20% yield on 18A when process is not mass production ready at 0.4D0
Here is an imaginary 20% yield wafer with 0.4D0 it is 480mm2 die

DavidC1 said:
By the way some people are claiming Intel said both Skymont and the ring has 400-500MHz headroom because it's running at an efficient spot(this part doesn't make as much sense).

It may be relatively easy to get Arctic Wolf at 5GHz. Then it's game over for P.

Oh yes they said simplied core development cycle in earning call we know what that means 🙂

Thunder 57 · Nov 1, 2024

DavidC1 said:
I translated a Japanese video on Youtube about Keller at Intel, Lunarlake and Arrowlake.

It says:
-Jim Keller never directly developed a core. He helped improve the flow of design and introduce better methodologies.
-Arrowlake was supposed to be earlier than Lunarlake, but it got delayed and they needed RPL-R. People say Arrowlake was still taking too long and Pat wanted it out.
-Lunarlake version of Lion Cove and Skymont has some advancements over Arrowlake(not the other way around). This is consistent with earlier leaks. In fact, it was said at AT forums that LNL cores have modifications over ARL cores.

It may not be 4 years delayed, but it still sucks. The 18A that's coming late next year is the specs of the original 20A. Meteorlake's Intel 4 could do better at 5.1GHz, and that's a mobile part. They couldn't meet their own performance goals on 20A or 18A. If Broadcom could only get 20% yield rate with 18A, how bad do you think 20A was?

By the way some people are claiming Intel said both Skymont and the ring has 400-500MHz headroom because it's running at an efficient spot(this part doesn't make as much sense).

It may be relatively easy to get Arctic Wolf at 5GHz. Then it's game over for P.

It gets old reading the Interwebs giving Jim Keller credit for things had had no part or little part in doing. It gets annoying. He is awesome at what he does to be sure, but people saying that X should hire him and fire anyone who disgrees with him is buffoonery. I don't think I've ever seen anyone in computing so hyped up as Jim Keller. /rant

As for Skymont, it may be clocked lower for better efficiency. The ring though seems to be in a rough spot. Intel should likely fix that as they use glue more in future generations. I think ARL will do well in laptops as buisnesses will buy them in hordes and no one cares much about gaming performance.

adroc_thurston · Nov 1, 2024

Thunder 57 said:
I think ARL will do well in laptops as buisnesses will buy them in hordes and no one cares much about gaming performance.

Businesses buy RPL-U refresh.

DavidC1 · Nov 1, 2024

Thunder 57 said:
As for Skymont, it may be clocked lower for better efficiency. The ring though seems to be in a rough spot. Intel should likely fix that as they use glue more in future generations. I think ARL will do well in laptops as buisnesses will buy them in hordes and no one cares much about gaming performance.

Arrowlake has a V/F curve better fit for mobile, so it'll do relatively better. It's a combination of DLVR which is meant for bursty scenarios and TSMC process better at lower clocks.

I remember people thinking DLVR was magic without reading the patent. All about tradeoffs.

coercitiv said:
This sounds very likely given the issues we've been able to identify in ARL that are not present in LNL. In fact I dare say we suspected as much even before ADL was launched because LNL has a superior topology to both MTL and it's ARL sibling.

It seems somehow Arrowlake even regressed compared to Meteorlake with memory latency.

adroc_thurston · Nov 1, 2024

DavidC1 said:
I remember people thinking DLVR was magic without reading the patent. All about tradeoffs

But it's just dLDOs.

Magio · Nov 1, 2024

DavidC1 said:
If Broadcom could only get 20% yield rate with 18A, how bad do you think 20A was?

Just to be sure, is 20% speculation from you or was something like that said by Intel or new reports? As I remember the initial reports only said Broadcom deemed 18A to not be ready for HVM (which wasn't very surprising either since that report was several months out from HVM even per Intel's plans), didn't mention figures and certainly none as alarming as 20% yield would be.

DrMrLordX · Nov 1, 2024

Thunder 57 said:
It gets old reading the Interwebs giving Jim Keller credit for things had had no part or little part in doing. It gets annoying. He is awesome at what he does to be sure, but people saying that X should hire him and fire anyone who disgrees with him is buffoonery. I don't think I've ever seen anyone in computing so hyped up as Jim Keller. /rant

Anyone interested in Keller should be looking at Tenstorrent. Granted, they've been somewhat quiet lately.

adroc_thurston said:
But it's just dLDOs.

Best (worst) acronym ever.

majord · Nov 1, 2024

SiliconFly said:
Are you sure?

So, all this MLID hoopla about Jim Keller's Royal Core is all nothing but imaginary bs?

He joined Intel as a Snr Vice president of the group.. Not an Engineer. Thus no involvment in core development.

Ditto AMD (Chief of Processor group)

Regardless. No one person designs a CPU architecture/core.

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Senior member

Attachments

Senior member

Golden Member

Diamond Member

Senior member

Golden Member

Senior member

Member

Golden Member

Senior member

Golden Member

Golden Member

Golden Member

Diamond Member

Golden Member

Diamond Member

Diamond Member

Golden Member

Golden Member

Diamond Member

Diamond Member

Golden Member

Diamond Member

Member

Lifer

Senior member