Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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DrMrLordX

Lifer
Apr 27, 2000
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CWF was always a late 2025 product.
My point still stands. It's Sierra Forest all over again.

Isn't Zen 6 like H2 2026?
Yeah but I'm not even talking about that (per se).

Long story short, Intel has nothing to face off against the competitor's dense solution for over a year. Once it shows up (Q3 or Q4 2025), it gets maybe two or three quarters to hopefully outperform Zen5c before it has to deal with Zen6c. Are we seeing Intel's problem yet?
 

511

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Jul 12, 2024
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My point still stands. It's Sierra Forest all over again.


Yeah but I'm not even talking about that (per se).

Long story short, Intel has nothing to face off against the competitor's dense solution for over a year. Once it shows up (Q3 or Q4 2025), it gets maybe two or three quarters to hopefully outperform Zen5c before it has to deal with Zen6c. Are we seeing Intel's problem yet?
If it beats Zen5C than AMD doesn't have anything until Zen6C it is just a cycle Intel needs to break it
 

mikk

Diamond Member
May 15, 2012
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@GTracing What the heck?

Geekerwan overclocked the following:
-NGU from 2.6GHz to 3.2GHz
-D2D from 2.1GHz to 3.5GHz
-Ring from 3.8GHz to 4.2GHz

The E core latency went down from 194.2ns to 113ns or a 72% difference. D2D OC is 67%, so a slow D2D may be responsible for the super high latency. I would have liked him to test perf/clock after the overclocks.


CapFrameX tested it, it's 105ns for the E-core and 97 ns for the P-core. Latency on E-core <10% higher. I think this is a more accurate and realistic test.


 

GTracing

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Aug 6, 2021
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CapFrameX tested it, it's 105ns for the E-core and 97 ns for the P-core. Latency on E-core <10% higher. I think this is a more accurate and realistic test.


That makes a lot more sense. I expect that is the "true" latency.

However, if the reason why Geekerwan measured higher latency is that the memory controller is in low-power mode (as João Bortolace suggested), then it's still possible that some synthetic tests are giving lower results than they should. Some single core benchmark that only run on one e-core could be affected by the increased latency.
 

DavidC1

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Dec 29, 2023
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However, if the reason why Geekerwan measured higher latency is that the memory controller is in low-power mode (as João Bortolace suggested), then it's still possible that some synthetic tests are giving lower results than they should. Some single core benchmark that only run on one e-core could be affected by the increased latency.
Things like these are what teams that are executing well and don't have to rush things out get fixed before releasing it and calling it a "product".

Geekerwan basically concluded that you could try many ways to improve performance but nothing really solves it. Sounds like the P core team also made Arrowlake.
 
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DavidC1

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Long story short, Intel has nothing to face off against the competitor's dense solution for over a year. Once it shows up (Q3 or Q4 2025), it gets maybe two or three quarters to hopefully outperform Zen5c before it has to deal with Zen6c. Are we seeing Intel's problem yet?
Only if Zen 6 isn't on a 22 month cycle it has been previously. Because that puts us September 2026. Then Rogue River Forest would be less than 6 months away.

Regardless when you consider AMD C parts and Intel Forest parts are mainly for Cloud and VM workloads Sierra Forest is already doing pretty well.
 
Jul 27, 2020
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However, if the reason why Geekerwan measured higher latency is that the memory controller is in low-power mode (as João Bortolace suggested)
Why would they allow the memory controller to go into low power mode on desktop? They should release a microcode update ASAP to let users control this behavior and keep the memory controller up and ready for action ALL the time if they so wish.
 

OneEng2

Senior member
Sep 19, 2022
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@SiliconFly I doubt core counts are going to be that high. Process gains are really slowing down, and they'll need to spend whatever they get on a new uarch. No room for more cores, plus you run into scaling issues.
While I don't know what core counts will be on Zen 6, the CCD will have double the cores that Zen 5 has. How many CCD's the decide to put on a package seems like it will be only limited by the power the socket can provide.... and the socket power is reportedly going up drastically for Zen 6 DC boards.
M5 is N3P from the rumours there is no way for N2 products before H2 2026 and AMD doesn't lead exactly like Apple so Zen6C is not happening before Q426
I disagree. We will most surely see N2 products in H1 (early H1 is my guess). Not sure how you are getting such a dismal forecast for TSMC.
I am talking about products in hands of consumer like us or the server guys do you think there is a chance that we will have new N2 product in our hand by May/June considering the fact that it is a New node family not iteration like N3E and N3P
Absolutely. Why not? (ie May/June 2026). In fact, TSMC will be ramping up N2P by that timeframe.
That seems a bit late to market if they expect to compete with Turin dense.
My thought exactly.
Isn't Zen 6 like H2 2026?
Possibly. My guess is about mid year.
It is Q325 iirc it was mentioned in one of the calls i may be wrong though
I remember this as well. I just don't believe it. I think the 18A process will slip by at least another quarter (You heard it here first!).
Long story short, Intel has nothing to face off against the competitor's dense solution for over a year. Once it shows up (Q3 or Q4 2025), it gets maybe two or three quarters to hopefully outperform Zen5c before it has to deal with Zen6c. Are we seeing Intel's problem yet?
That is how I see it as well. The cadence is off for Intel.

More to the point, none of this brings Intel back to profitability. To do that, they need to be selling foundry space on 18A .... and do it in high enough volumes to make their balance sheet work again. I think this is more problematic than the DC server chip design.
 

511

Golden Member
Jul 12, 2024
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I disagree. We will most surely see N2 products in H1 (early H1 is my guess). Not sure how you are getting such a dismal forecast for TSMC.
What product tell me though Apple has been the lead product maker on TSMCs leading edge node the earliest i would take is june
Absolutely. Why not? (ie May/June 2026). In fact, TSMC will be ramping up N2P by that timeframe.

My thought exactly.

Possibly. My guess is about mid year.

I remember this as well. I just don't believe it. I think the 18A process will slip by at least another quarter (You heard it here first!).

That is how I see it as well. The cadence is off for Intel.
Of course than it would mean TSMC is lying about N2 at IEDM 🙂
 
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DrMrLordX

Lifer
Apr 27, 2000
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If it beats Zen5C than AMD doesn't have anything until Zen6C it is just a cycle Intel needs to break it

Right but Intel's track record up to this point hasn't been good on breaking this cycle. They're reacting slowly to competition rather than planning to beat it.

In theory, dense cloud solutions should be Intel's best datacenter products, given the rate at which Atom cores have been improving. In practice Intel's dense cloud solutions have been slow to market.

Only if Zen 6 isn't on a 22 month cycle it has been previously. Because that puts us September 2026. Then Rogue River Forest would be less than 6 months away.

Given the way Gelsinger is plotting a course for Intel's future, there may not even be a Rogue River Forest. Also see above, don't expect Intel to execute on dates perfectly.

Regardless when you consider AMD C parts and Intel Forest parts are mainly for Cloud and VM workloads Sierra Forest is already doing pretty well.
Sierra Forest is decidedly not doing very well. It can't compete with Turin dense on performance or perf/watt. It had only a few months of market relevancy, and now it's dead. The only way Intel is going to move this hardware is through the same methods that Intel managed to move any significant volume of Sapphire Rapids: vendor lock-in and discounts.
 
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Hitman928

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Apr 15, 2012
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What product tell me though Apple has been the lead product maker on TSMCs leading edge node the earliest i would take is june

Of course than it would mean TSMC is lying about N2 at IEDM 🙂

If they mean TSMC won't reach HVM until 2026, then that's a delay. If they mean that TSMC will ramp into 2026, that was expected and doesn't prevent the first products from being taped out at the end of 2025.

Edit: The tweet doesn't match the IEDM link. Here is the quote from the session info:

 
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511

Golden Member
Jul 12, 2024
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If they mean TSMC won't reach HVM until 2026, then that's a delay. If they mean that TSMC will ramp into 2026, that was expected and doesn't prevent the first products from being taped out at the end of 2025.
Product tapes out 1-1.5 year before mass production usually 😅 as for 2nd part now i am confused by this I wil see the results directly in 2026
 

511

Golden Member
Jul 12, 2024
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Given the way Gelsinger is plotting a course for Intel's future, there may not even be a Rogue River Forest. Also see above, don't expect Intel to execute on dates perfectly.
Why the negativity for Rouge river forest it is coming Raichu and Bionic squash has confirmed it on Twitter and can we stop blaming everything on Gelsinger outside of the GPU and his rear view mirror comment which is aging like fine wine he thought his predecessor has planned everything out just to see how horrible the products his predecessor created
Sierra Forest is decidedly not doing very well. It can't compete with Turin dense on performance or perf/watt. It had only a few months of market relevancy, and now it's dead. The only way Intel is going to move this hardware is through the same methods that Intel managed to move any significant volume of Sapphire Rapids: vendor lock-in and discounts.
How can you say that it is not doing well otherwise Intels DC revenue would not be 9% up they are due to SRF/GNR there is no other way for it to go up
 

Hitman928

Diamond Member
Apr 15, 2012
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When do companies like AMD/Nvidia tape out than any public info?

Depends on the product and the node. Something like MI300 will be longer between "tape out" and products shipping because there is so much advanced packaging and testing that has to happen. Something like a Ryzen product will be faster. I'd say anywhere from 6 - 9 months is typical. It could happen faster but typically not with these more advanced nodes. Intel seems to have a different meaning behind tape out than the rest of the industry (there are actually multiple tape outs that happen before a product is sold, usually when we talk about taping out in a public way, it means mass production. Intel seems to announce tape out for QS or even earlier).
 
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