Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

511 · Nov 12, 2024

DavidC1 said:
You don't need a die shot. You only need a shot of the package. You find the size of the LGA7529 package. The actual shot shows having 3x narrow dies. The narrowness is because the dies are right next to each other like on Meteorlake. Each narrow die is actually 4 of them. You find the size of the narrow geometry, and divide by 4.

It's possible 4 of the dies are connected by Foveros, and connection to another of the quad die groups are done using EMIB. Then again, SPR is using EMIB only and it's pretty close between the dies.

The thing is the 18A dies are under the Intel 3 dies and they are distant apart from the initial diagram each die has distance between them which will slice the area same issue as Zen5X3D

DavidC1 said:
Same with how I got Turin Dense Zen 5c's size. You get the package size, and measure the die. There's a clear separation between core and L2 for AMD, so it's even easier to find core size only.

Amd it is easy due to dies are Visible

Saylick · Nov 12, 2024

511 said:
The thing is the 18A dies are under the Intel 3 dies and they are distant apart from the initial diagram each die has distance between them which will slice the area same issue as Zen5X3D

Don't you mean the 18A compute tiles are ABOVE the Intel 3 base dies?

Kocicak · Nov 12, 2024

511 said:
If you had multiple defective cpu either you are getting wrong CPUs constantly or there somewhere something in MB causing issues my advice would be cap IA voltage to around 1.45V or maybe 1.5V depending on the desired frequency it will prevent degradation altogether on new cpu

He used the CPU for a few months without any limits - IMO 90% of the damage happened in that period.

Also 5500 MHz is not a "chip friendly" frequency at all. I think I wrote this ten times already - the process Intel uses to make these chips is not up to such high frequencies.

511 · Nov 12, 2024

Kocicak said:
He used the CPU for a few months without any limits - IMO 90% of the damage happened in that period.

Also 5500 MHz is not a "chip friendly" frequency at all. I think I wrote that ten times already - the process Intel uses to make these chips is not up to such high frequencies.

Frequency doesn't matter voltage does cause it is a function of voltage itself

511 · Nov 12, 2024

Saylick said:
Don't you mean the 18A compute tiles are ABOVE the Intel 3 base dies?

Nope The compute dies are under the base dies containing Mesh/IMC/LLC here is the image

Kocicak · Nov 12, 2024

511 said:
Frequency doesn't matter voltage does cause it is a function of voltage itself

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Gideon · Nov 12, 2024

SiliconFly said:
When Zen 5 desktop parts were launched it was a disaster requiring some agesa bios updates and windows 24H2 patches. Same like ARL now requires similar bios updates & possible windows patches.

Looks like some have either forgotten about it already or just want to ignore it.

Apparently, it was okay to wait for amd’s patches, but not now for Intel’s.

Your clear bias is showing here, despite calling you out already.

Every major launch has benefited from BIOS updates, windows scheduler changes and new chipset drivers. None has had issues with worse average performance than the predecessor without them.

Zen 5 was consistently better than Zen 4. Even in gaming, whether it was 3-5% faster on average (not slower as intel). Windows 24H2 patches also screwed Zen 4 (since time memorial it turned out, an issue AMD also should have caught)

Saylick · Nov 12, 2024

511 said:
Nope The compute dies are under the base dies containing Mesh/IMC/LLC here is the image
View attachment 111489

We sure those aren’t structural silicon across the top of the compute tiles?

Abwx · Nov 12, 2024

511 said:
Raichus review for ARL is up

https://twitter.com/x/status/1856188360043434305
View attachment 111484
View attachment 111485

DDR7000 for Intel and 6000 for AMD.

511 · Nov 12, 2024

Saylick said:
We sure those aren’t structural silicon across the top of the compute tiles?

Yes it is the same as 9800X3D

511 · Nov 12, 2024

It's different from Golden shine on intel CPUs EMIB packing(GNR/SRF)

511 · Nov 12, 2024

Is there a thread for something like laptop CPUs thermal paste application ?

SteinFG · Nov 12, 2024

Abwx said:
DDR7000 for Intel and 6000 for AMD.

That's expected, Intel has better IMC this gen

Hulk · Nov 12, 2024

igor_kavinski said:
Hey, maybe the CPU tries to compensate for the lack of power by overperforming in ST with higher than normal boosts since it isn't allowed to flex its muscles MT-wise? Definitely seems like some sort of boosting algo designed to win benchmarks in the short term.

Frequency capped at 5.5/4.4 on the 2nd one to avoid requests for ridiculous voltage.

Hulk · Nov 12, 2024

511 said:
If you had multiple defective cpu either you are getting wrong CPUs constantly or there somewhere something in MB causing issues my advice would be cap IA voltage to around 1.45V or maybe 1.5V depending on the desired frequency it will prevent degradation altogether on new cpu

They significantly improved the FP performance full fat AVX-512 with more units to feed

Capped voltage at 1.3 on the 2nd sample. Lasted longer but still failed eventually.

Hulk · Nov 12, 2024

511 said:
Raichus review for ARL is up

https://twitter.com/x/status/1856188360043434305
View attachment 111484
View attachment 111485

Why are there two sets of the apparent same tests with different results? Is one MT? Are all clocks set the same? I'm confused as what to make of this.

511 · Nov 12, 2024

Hulk said:
Why are there two sets of the apparent same tests with different results? Is one MT? Are all clocks set the same? I'm confused as what to make of this.

One is fixed clock and th other is at stock clock

Hulk · Nov 12, 2024

511 said:
One is fixed clock and th other is at stock clock

What is U9?

MS_AT · Nov 12, 2024

511 said:
They significantly improved the FP performance full fat AVX-512 with more units to feed

Nope. We don't know in the context of Raichu's results. GCC version used is version 10, with no information about used flags. The claim that AVX512 was used is as valid as that only SSE 4.1 was used unless we get more info.

igor_kavinski · Nov 12, 2024

Hulk said:
Capped voltage at 1.3 on the 2nd sample. Lasted longer but still failed eventually.

Maybe some calibration issue where for brief nanoseconds it is going to 1.6 or higher so after enough jolts, the transistors start degrading.

igor_kavinski · Nov 12, 2024

Hulk said:
What is U9?

Core Ultra 9 series, which currently only has the 285K SKU.

coercitiv · Nov 12, 2024

Hulk said:
What is U9?

It's an i9 in need of a firmware fix.

dttprofessor · Nov 12, 2024

511 said:
Nope The compute dies are under the base dies containing Mesh/IMC/LLC here is the image
View attachment 111489

maybe sticker on it

Hitman928 · Nov 12, 2024

511 said:
Yes it is the same as 9800X3D

If it’s the same as the 9800x3d, then the compute tiles are on top, which is what the Intel slide also shows. . .

511 · Nov 12, 2024

Hitman928 said:
If it’s the same as the 9800x3d, then the compute tiles are on top, which is what the Intel slide also shows. . .

This one is on me i took the wrong reference but from the die shot it is clear the Intel 3 is the top die while the Cores are below those big dies

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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