Do we know this?Zen6 client will abandon CCDs + IODs if what we're being told is true. It'll be APUs for client desktop and mobile. Not sure what will happen to the Range product line though.
?Zen6 client will abandon CCDs + IODs if what we're being told is true.
Gator Range is medusa DT in BGA.Not sure what will happen to the Range product line though.
Not even Linux support just support Vulkan for gaming. Keep Metal for compute.The issue is that M4 seems to have a pretty beefy iGPU that would (theoretically) beat a lot of mdGPU competition if Apple allowed it. Or to put it another way, if Apple opened up the M4 and let Linux run on it, how many existing dGPU/mdGPU solutions could beat it on a level playing field?
For compute? move onKeeping all that in mind, how strong will the iGPU on Strix Halo be?
Agree, AMD is the one to blame. Strix Point is priced too high compared to previous APUs.Meh, when it's absolutely all of them, and the cheapest Mini PC with this chip costs 1000$, then it's evident AMD is pricing this thing way too high.
IIRC AMD does not set prices of laptops. Correct me if I am mistaken.Well it's AMDs fault then, I checked on Amazon and Newegg and there are zero laptops with HX 370 below 1500$. Most of them have dGPU but even ones with a measly 4050 were going for more than 1700$.
I mean, what's the point in creating an APU with the most CU (890M) but still worse than an entry level 4050 if all the laptops using them are going to be so expensive? makes zero sense to me.
That is inaccurate. The Fusion project began in 2006 which would be around the timeframe that the Bulldozer design began. And, I do recall that AMD made statements that they expected heavy floating point tasks would move to the GPU when Bulldozer released. I haven’t come across any explicit statements that they were conceived together, but it is hard to imagine that not being the case.HSA is not part of the reasons for the shared FPU. The architectural choice for the shared FPU was done before Fusion/HSA was born.
Huang made an article on big iGPUs mainly about M4 pro but the same will apply to M4 Max/Strix halo
He says users can just multiple dGPUs to bypass the low VRAM. It will be more cost effective and a lot faster for LLMs.
Big iGPUs are way to save money for AMD/Apple. Simple as that. For laptops they make sense but desktops is a BIG no.
Most gamers will look for the green sticker, this will be true until AMD beats Nvidia in all areas for gaming like the current X3D cpus.
The only part of Strix halo I'm interested is the CPU part, GPU not so much. Apple already has a bigger IGPU for those LLM users with higher BW.
Gaming is a wash as its still RDNA 3.5.
We're also still in the "early adopter tax" era of a new AMD laptop processor. It'll come down by ~20% by the middle of 1Q25. My son managed to purchase an 8845hs/4060/32GB/1TB laptop a couple months ago for a list price near $850. That was over $1100 when I first saw that configuration on the market.IIRC AMD does not set prices of laptops. Correct me if I am mistaken.
The marketing was so good that I've never heard of Gamecache until today.Gamecache was probably peak stupidity. Maybe not as its been consistently bad. But that one was really stupid.
That's because HPT was already demoted to $800 SPP.My son managed to purchase an 8845hs/4060/32GB/1TB laptop a couple months ago for a list price near $850
Quite a few people are overestimating the 4070m, Strix Halo should win comfortably.For gaming it will be on par with a 4070 mobile in rasterisation
The main factor for the cores having a shared FPU is area-related. Bulldozer's design lineage began in 1998.That is inaccurate. The Fusion project began in 2006 which would be around the timeframe that the Bulldozer design began. And, I do recall that AMD made statements that they expected heavy floating point tasks would move to the GPU when Bulldozer released. I haven’t come across any explicit statements that they were conceived together, but it is hard to imagine that not being the case.
Also your previous comment about it being an area thing can be true, but in and of itself doesn’t not exclude HSA being an another factor, nor even what is what is more likely, the main factor.
Do we know this?
If Apple allowed a different OS, then other dGPU vendor drivers could probably work without having to produce new builds just for MacOS (which would then allow us to see how M4's iGPU would stack up against dGPUs on the same platform).Not even Linux support just support Vulkan for gaming. Keep Metal for compute.
Rumor is desktop & mobile would share designs. Nothing about what those designs would be.Isn't Zen6 client all going to be monolithic?
The main factor for the cores having a shared FPU is area-related. Bulldozer's design lineage began in 1998.
First design, low-power, had homogeneous clusters (2 Int+FP) - 1998
Second design, low-power, had heterogeneous clusters (1Int + 1 FP) - 1999-2002 [effectively became Bobcat]
Third design, high-performance, had homogeneous integer clusters with a single FPU (2 Int + 1 FP) - 2002-2004
Fourth design, low-power, similar to above but is built for compute density and efficiency, SMT-like behavior - 2005-2007 (Cluster-based Multithreading, Multi-threaded Compute Core)
View attachment 111707
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Fifth design, high-performance, adds additional resources at various stages to allow the combinable clusters to be uncombinable cores, CMP-like behavior - 2007-2010 (Chip-level Multithreading, Dual-core Compute Module) [this one is closely related to Andy Glew's K10, not Charles R. Moore's Bulldozer]
The first fusion product was Swift. Which had two Stars Gen3 cores. Which was followed up by quad-core Llano which actually released.
AMD's design teams are not smart enough to conspire a weak FPU to sell Fusion/APUs/HSA or anything like it. Bulldozer and Fusion was not conceived together.
AMD has needed HSA for a long time. The Bulldozer processor module, introduced in late 2011, paired two integer cores to a single shared floating point unit. Each core pair can run two threads, but if both threads make intensive use of floating point code, they have to compete for that shared floating point unit.
AMD's theory was that floating point-intensive code would use the GPU, so the relative lack of floating point power in the CPU wouldn't matter. But that didn't happen and still hasn't happened. There are several reasons for this, but one of the biggest is the inconvenience and inefficiency of mixing between CPU and GPU code, due to the memory copying and pinning that has to take place. HSA eliminates these steps. While this still doesn't make programming the GPU easy—many programmers will have to learn new techniques to take advantage of their massively parallel nature—it certainly makes it easier.
I am adopting early tax, due to IF tariffs are applied, it could possibly cost more than msrp now. 9800x3d.We're also still in the "early adopter tax" era of a new AMD laptop processor. It'll come down by ~20% by the middle of 1Q25. My son managed to purchase an 8845hs/4060/32GB/1TB laptop a couple months ago for a list price near $850. That was over $1100 when I first saw that configuration on the market.
Who's DrPizza? I used anandtech before arstechnica. You didn't like that source either.@GTracing
Peter Bright. AMD's "heterogeneous Uniform Memory Access" coming this year in Kaveri, Ars Technica, April 30, 2013.
Are you sure you want to use DrPizza's op-ed pieces as a source?
I have already gone through the history of Bulldozer. There is not a single inch of design collaboration between the Bulldozer team and fusion/apu/hsa team. None.
Not really on-topic (and fie upon Nosta for bringing up the subject), but if you really must know:Who's DrPizza?
Yikes. Did he write the article? It just says "Ars Staff" for me. But I could see where they'd want to remove any reference to a problematic author like that.Not really on-topic (and fie upon Nosta for bringing up the subject), but if you really must know:
Name those 1998 - 2009 chips please. If you search Bulldozer on Anandtech, the first Bulldozer was 2011, articles I read at the time they published. Rereading those articles, there is no reference to pre-2011 Bulldozer.The main factor for the cores having a shared FPU is area-related. Bulldozer's design lineage began in 1998.
First design, low-power, had homogeneous clusters (2 Int+FP) - 1998
Second design, low-power, had heterogeneous clusters (1Int + 1 FP) - 1999-2002 [effectively became Bobcat]
Third design, high-performance, had homogeneous integer clusters with a single FPU (2 Int + 1 FP) - 2002-2004
Fourth design, low-power, similar to above but is built for compute density and efficiency, SMT-like behavior - 2005-2007 (Cluster-based Multithreading, Multi-threaded Compute Core)
View attachment 111707
~~~
Fifth design, high-performance, adds additional resources at various stages to allow the combinable clusters to be uncombinable cores, CMP-like behavior - 2007-2010 (Chip-level Multithreading, Dual-core Compute Module) [this one is closely related to Andy Glew's K10, not Charles R. Moore's Bulldozer]
The first fusion product was Swift. Which had two Stars Gen3 cores. Which was followed up by quad-core Llano which actually released.
AMD's design teams are not smart enough to conspire a weak FPU to sell Fusion/APUs/HSA or anything like it. Bulldozer and Fusion was not conceived together.
Name those 1998 - 2009 chips please. If you search Bulldozer on Anandtech, the first Bulldozer was 2011, articles I read at the time they published. Rereading those articles, there is no reference to pre-2011 Bulldozer.
Please explain what you are referencing.
It bad that he is a pedophile, but that has no impact on the accuracy of his technical writing. His Ars articles remain valid.Yikes. Did he write the article? It just says "Ars Staff" for me. But I could see where they'd want to remove any reference to a problematic author like that.
The challenge is quite tricky here. Apple is seen as a vertically integrated provider where the claim that they choose only the best possible ingredients is believable. That approach is boosted by not even allowing any alternatives.
No one ever said or even implied that.Isn't Zen6 client all going to be monolithic?
And probably server-derived CCDs ??No one ever said or even implied that.
It's just that client no longer contains server-derived designs.
No? It's the opposite with APUs moving towards chiplets instead.Isn't Zen6 client all going to be monolithic?