Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

igor_kavinski · Nov 19, 2024

AMD Ryzen 7 9800X3D workstation test: Is it mean or does it just want to play? | Part 2 of 2 | Page 7 | igor´sLAB

Gaming was yesterday, in the truest sense of the word. I’ve linked yesterday’s article with the gaming benchmarks below. Today we finally have something for the working people, who of course also like…

www.igorslab.de

Cheer up, gloomy Intel folks!

Pat's confused CPU team managed to create at least one SKU that wins the efficiency crown in at least ONE benchmark

DavidC1 · Nov 19, 2024

majord said:
Why is this?

ARL-U is Meteorlake ported to Intel 3.

511 · Nov 19, 2024

igor_kavinski said:
AMD Ryzen 7 9800X3D workstation test: Is it mean or does it just want to play? | Part 2 of 2 | Page 7 | igor´sLAB

Gaming was yesterday, in the truest sense of the word. I’ve linked yesterday’s article with the gaming benchmarks below. Today we finally have something for the working people, who of course also like…

www.igorslab.de

Cheer up, gloomy Intel folks!

Pat's confused CPU team managed to create at least one SKU that wins the efficiency crown in at least ONE benchmark

View attachment 111852

If you remove dlvr the MT power efficiency increases drastically though u have to give skymont team the credit its just they make worse decision again and again probably some product manager

adroc_thurston · Nov 19, 2024

511 said:
If you remove dlvr the MT power efficiency increases drastically

No, you're just moving pdn losses elsewhere.

DavidC1 · Nov 19, 2024

adroc_thurston said:
No, you're just moving pdn losses elsewhere.

Why? Bypassing DLVR means under load you don't have the losses due to going through the linear regulator.

Hulk · Nov 19, 2024

AcrosTinus said:
No, it is not my own rig, a friend wanted to build a new machine (he is still on a 6700K,1070Ti) and I convinced him to buy Arrow Lake, what a good friend I am I know. While assembling the machine I ran some benches.

You ARE a good friend. We all know that when you build a rig or even suggest what to buy you're on the hook for tech support for the life of the product!

Hulk · Nov 19, 2024

DavidC1 said:
ARL-U is Meteorlake ported to Intel 3.

That is a letdown. I guess Intel 3 doesn't have the transistor density for Lion Cove and Skymont to make it economically feasible.

adroc_thurston · Nov 19, 2024

Hulk said:
I guess Intel 3 doesn't have the transistor density for Lion Cove and Skymont to make it economically feasible.

It's just a minimal effort refresh for mainstream (well, as mainstream as MTL can get).

511 · Nov 20, 2024

The refresh may be more intresting as we can compare I3 vs I4 on an same architecture to understand the gain of the process of the die is roughly 5% smaller from the nodes public info

DavidC1 · Nov 20, 2024

Hulk said:
That is a letdown. I guess Intel 3 doesn't have the transistor density for Lion Cove and Skymont to make it economically feasible.

It's basically to fill the low price segment that Lunarlake can't fill.

It looks like based on clocks it should be solid 20% faster in MT which is decent.

dttprofessor said:
It‘s not good compare to 8845,but not bad for U15.

It's not too good price wise either.

Certainly not compared to the days when they could use a 80mm2 dual core die that is branded up to Core i3 and sold in tens of millions. Now you have packaging costs on top of needing various sized dies, one which is big as a single die back then.

Of course compared to Lunarlake it might be cheap, but that's not saying much. To the finance company known as "Intel" it's basically choosing between urine and feces to step on.

511 · Nov 20, 2024

Hulk said:
That is a letdown. I guess Intel 3 doesn't have the transistor density for Lion Cove and Skymont to make it economically feasible.

I don't think that's the reason it's HP Libraries (3-3) which are pretty much on par in between nodes(Intel 3 and N3E) as for LNC it is a regression vs RWC in some areas for skymont you have to ask intel cause it would have been on par with N3B
as for cheaper option it would be fine for the 800$ market

LightningZ71 · Nov 20, 2024

With 2-300mhz boost improvement, it should be about 5% better in single core benchmarks too. The E cores boost speeds, notably all-core boosts are up a good bit. It remains to be seen if they raised the ring bus speeds as they were quite low on OG Meteor Lake as they could be an issue for the MT scores...

511 · Nov 20, 2024

The biggest improvements are base speed with the boost speed can't show their worth due to OEMs ~~bad practices like cheaping out on paste~~ Optimizations

Hulk · Nov 20, 2024

511 said:
I don't think that's the reason it's HP Libraries (3-3) which are pretty much on par in between nodes(Intel 3 and N3E) as for LNC it is a regression vs RWC in some areas for skymont you have to ask intel cause it would have been on par with N3B
as for cheaper option it would be fine for the 800$ market

Losing Lion Cove isn't a big deal but not including Skymont is a big hit in performance.

LightningZ71 · Nov 20, 2024

Even at the improved density (if any) that Intel3 brings, there wouldn't be physically enough room on the package substrate to fit a die large enough to hold 8 Skymont cores with the required P cores. Also, consider that part of why Arrow Lake is so dependent on the performance of Skymont is that Lion Cove doesn't have HT enabled. The P cores on Meteor lake DO have HT. Faster E cores coupled with faster P cores will make a notable difference in MT.

dttprofessor · Nov 20, 2024

Hulk said:
Losing Lion Cove isn't a big deal but not including Skymont is a big hit in performance.

For CCG ,intel 3 is a expensive node.
For Pat , intel 3 is good.

511 · Nov 20, 2024

Hulk said:
Losing Lion Cove isn't a big deal but not including Skymont is a big hit in performance.

Exactly i agree

511 · Nov 20, 2024

dttprofessor said:
For CCG ,intel 3 is a expensive node.
For Pat , intel 3 is good.

For intel as a whole it is a cheaper node also Skymont stated with N3 in mind I don't think they ever thought Intel 3 would be so good as it is rn when starting in 2020-21 planning for ARL

OneEng2 · Nov 20, 2024

Seems like an awful lot of tap dancing going on over at Intel.

adroc_thurston · Nov 20, 2024

511 said:
Skymont stated with N3 in mind

It's a portable core made with industry standard EDA tools. There's no "node in mind".

Josh128 · Nov 20, 2024

adroc_thurston said:
It's a portable core made with industry standard EDA tools. There's no "node in mind".

All modern cores are definitely designed with node in mind, regardless of portability to other nodes.

SiliconFly · Nov 20, 2024

adroc_thurston said:
It's a portable core made with industry standard EDA tools. There's no "node in mind".

Even though it's portable (node agnostic), it still takes a significant amount of (engineering) effort, time & money to fab it in a new node. Time & money is something Intel doesn't have at the moment.

Josh128 said:
All modern cores are definitely designed with node in mind, regardless of portability to other nodes.

Modern cores are mostly portable across nodes. But sadly, portable doesn't mean easy and/or cheap in this context.

511 · Nov 20, 2024

adroc_thurston said:
It's a portable core made with industry standard EDA tools. There's no "node in mind".

Yes but during the start phase it was with N3 and no one at intel knew about the future of the nodes and they would turn to be better

adroc_thurston · Nov 20, 2024

Josh128 said:
All modern cores are definitely designed with node in mind, regardless of portability to other nodes.

No.
Intel picked N3 because it was the best node available. That's it!

SiliconFly said:
Even though it's portable (node agnostic), it still takes a significant amount of (engineering) effort, time & money to fab it in a new node

Nope, someone like ARM serves reference physical implementations yearly for a whole bunch of cores, for a pile of very different nodes.

SiliconFly · Nov 20, 2024

adroc_thurston said:
No.
Intel picked N3 because it was the best node available. That's it!

Nope, someone like ARM serves reference physical implementations yearly for a whole bunch of cores, for a pile of very different nodes.

Those maybe generic designs. From what I gather, a complex core like LNC needs to be optimized for each node if it needs to hit higher performance. Some of the structures may need rework to squeeze out every last drop of performance the libraries have to offer, or to hit higher frequencies. I don't remember who exactly said this, but I remember reading that no designs can be made 100% node agnostic.

Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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