Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

Tigerick · Aug 22, 2022

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

Model	Code-Name	Date	TDP	Node	Tiles	Main Tile	CPU	LP E-Core	LLC	GPU	Xe-cores
Core Ultra 100U	Meteor Lake	Q4 2023	15 - 57 W	Intel 4 + N5 + N6	4	tCPU	2P + 8E	2	12 MB	Intel Graphics	4
?	Lunar Lake	Q4 2024	17 - 30 W	N3B + N6	2	CPU + GPU & IMC	4P + 4E	0	12 MB	Arc	8
?	Panther Lake	Q1 2026 ?	?	Intel 18A + N3E	3	CPU + MC	4P + 8E	4	?	Arc	12

Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

	Meteor Lake	Arrow Lake (N3B)	Lunar Lake	Panther Lake
Platform	Mobile H/U Only	Desktop & Mobile H&HX	Mobile U Only	Mobile H
Process Node	Intel 4	TSMC N3B	TSMC N3B	Intel 18A
Date	Q4 2023	Desktop-Q4-2024 H&HX-Q1-2025	Q4 2024	Q1 2026 ?
Full Die	6P + 8P	8P + 16E	4P + 4E	4P + 8E
LLC	24 MB	36 MB ?	12 MB	?
tCPU	66.48
tGPU	44.45
SoC	96.77
IOE	44.45
Total	252.15

Intel Core Ultra 100 - Meteor Lake

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

adroc_thurston · Thursday at 11:45 PM

OneEng2 said:
Intel decided INTENTIONALLY to abandon their own fabs

yeah.

OneEng2 said:
pay MORE to have their core processor tile produced at TSMC

right.

OneEng2 said:
and ALSO decided to spend billions of dollars to continue making their own 20A, 18A and 16A processes as well

aye.

OneEng2 said:
all culminating into the biggest losses in the companies history?

not following ya', cap'n.

OneEng2 said:
Please explain this logic to me.

Keller reorgs allowed product teams to pick the best node for the job. N3 has unbeatable xtor perf so CCG guys picked it.
But as you've said, that's $$$ so the end goal is always to put the biggest amount of products onto internal nodes.
Which is why they run their fab roadmap too.

511 · Friday at 12:22 AM

OneEng2 said:
So you are saying that Arrow Lake, Lunar Lake were both originally targeting using TSMC? That is not at all what I had heard. Do you have a link? Every resource I can find states that Intel originally targeted 20A for these processors and had to go to TSMC OR wait until 18A was ready. The rest is history.

Nope only 20A product was one die of ARL which got canned due to 20A being canned also LNL was after pat took over ARL/MTL were defined in 2020/2019 afaik after pat they improved GNR.SRF was after pat as well it was never on road map before

OneEng2 said:
If you are correct, that isn't a great strategy IMO. In a server environment, the limiting factor doesn't end up being die size since you can conceivably put as many tiles/CCD's on an SOC as you want and cost is largely not relevant.... but socket power is. Thermal issues and power issues would limit such a design.

Their nodes are perfect look at the E-Core design it's so efficient and Good both in server/Client product it's the horrendous PPA of P core that is trash

OneEng2 said:
In desktop, this is also a losing strategy for a different reason. Die size (cost) is suddenly VERY important. With die size pricing increasing super-linearly (exponentially?) a strategy that doesn't compete in density is a loser IMO.

Desktop/Hpc Used HP libraries Intel already has the best Libraries for those it's the Mobile/GPU(HD) libraries they were lacking and it is on roadmap now once they are done everything goes internal outside of few volume

OneEng2 said:
I do tend to agree with you though that Intel has been targeting max performance from every point of design. At some points in history, they did this to such an extreme that it was comical. I recall joking about what a great space heater P4 was .

And we have 13900K/14900K despite being the heaters they are they still give competition and intel themselves run for their money they also gets Destroyed in the process though 🤣.
I am pretty sure CIA will like these cpu so they don't have to worry about leaving evidence behind

Sunaiac · Friday at 5:48 AM

Pentium pro page !

Time to get my GA-686NX / 200MHz - 1M out of the closet for a quake run.

RTX · Friday at 9:14 AM

LightningZ71 said:
they'll probably relax the density metrics on Intel 7 one more time, just like they did from Alder Lake to Raptor Lake, then Raptor Lake to Raptor Lake Refresh...

There's no die size increase in the 12900H->13900H and yet the latter is much quicker.

511 · Friday at 9:48 AM

RTX said:
There's no die size increase in the 12900H->13900H and yet the latter is much quicker.

New stepping probably optimization

RTX · Friday at 10:04 AM

They redid the layout for 13th gen.

511 · Friday at 10:18 AM

Makes sense that is why it is a new stepping

OneEng2 · Friday at 11:52 AM

511 said:
Nope only 20A product was one die of ARL which got canned due to 20A being canned also LNL was after pat took over ARL/MTL were defined in 2020/2019 afaik after pat they improved GNR.SRF was after pat as well it was never on road map before

Their nodes are perfect look at the E-Core design it's so efficient and Good both in server/Client product it's the horrendous PPA of P core that is trash

Desktop/Hpc Used HP libraries Intel already has the best Libraries for those it's the Mobile/GPU(HD) libraries they were lacking and it is on roadmap now once they are done everything goes internal outside of few volume

And we have 13900K/14900K despite being the heaters they are they still give competition and intel themselves run for their money they also gets Destroyed in the process though 🤣.
I am pretty sure CIA will like these cpu so they don't have to worry about leaving evidence behind
View attachment 111978

OK, I am going to have to pull out the "Are you kidding me" card here.

Intel has a long history of religious adherence to vertical integration. The heart of this process has always been their own superior foundry capabilities.

Are you saying that you believe that Intel DECIDED to throw this philosophy out the window and PAY someone else (TSMC) to make their chips? Link please. I can't fathom Intel making such a statement. It flies in the face of my 30+ years of following this industry.

I can certainly see Intel having a backup plan that produced their chips at TSMC; however, no one could have been so stupid not to be able to do the simple math that would show how costly and unprofitable this move would be. The very simplicity of understanding the financial issues with this move is why I simply can't agree that it was "planned".

With respect to how great Skymont is, are you sure? I believe that Skymont would not fare well in a DC application compared to Zen 5c. It would also not fare well in HPC workstations. In DC the "lots of weak cores" strategy fails under software licensing models. In workstation, it does better, but still comes down to higher performance within a platform (exe Thread ripper).

As for 13K and 14K still competing ... did they really? Looks to me like they did quite a bit more harm than good to the company. Besides, focusing on desktop with this "no holes barred" performance approach is crazy. It is a shrinking market and is much smaller than laptop and DC .... as well as having lower margins (all but the gaming segment).

511 · Friday at 12:18 PM

OneEng2 said:
OK, I am going to have to pull out the "Are you kidding me" card here.

Intel has a long history of religious adherence to vertical integration. The heart of this process has always been their own superior foundry capabilities.

Are you saying that you believe that Intel DECIDED to throw this philosophy out the window and PAY someone else (TSMC) to make their chips? Link please. I can't fathom Intel making such a statement. It flies in the face of my 30+ years of following this industry.

It is rumoured to be a reason Swan got his way out of the company he was temporary but no one at board like it the manufacturing giant outsourcing their main Biz.It seems crazy to this day and you think we were not surprised lol . It us a one time thing for this volume they will be going back 2 their own foundry

OneEng2 said:
I can certainly see Intel having a backup plan that produced their chips at TSMC; however, no one could have been so stupid not to be able to do the simple math that would show how costly and unprofitable this move would be. The very simplicity of understanding the financial issues with this move is why I simply can't agree that it was "planned".

With respect to how great Skymont is, are you sure? I believe that Skymont would not fare well in a DC application compared to Zen 5c. It would also not fare well in HPC workstations. In DC the "lots of weak cores" strategy fails under software licensing models. In workstation, it does better, but still comes down to higher performance within a platform (exe Thread ripper).

I think you underestimate the Xeon base and Skymont is not a joke in both FP/Int you can do like 10:1 consolidation of Skylake era(28 Cores) CPU with Clearwater gorest with PPC higher than Raptor Cove also as for software each software has different licensing models and stuff and other things to consider many people don't want HT cores so that means even Turin-D is just 192 Cores
The integer performance will not be far apart per core also if you think Skymont is weak than it means Zen4 is weak as well ( ignoring AVX-512) and it is not targeted at HPC Market at all lol

OneEng2 said:
As for 13K and 14K still competing ... did they really? Looks to me like they did quite a bit more harm than good to the company. Besides, focusing on desktop with this "no holes barred" performance approach is crazy. It is a shrinking market and is much smaller than laptop and DC .... as well as having lower margins (all but the gaming segment).

I mean they did compete on performance no one is going to deny that but they also got them in a bad spot so it is a double edged sword

Hulk · Friday at 12:19 PM

OneEng2 said:
OK, I am going to have to pull out the "Are you kidding me" card here.

Intel has a long history of religious adherence to vertical integration. The heart of this process has always been their own superior foundry capabilities.

Are you saying that you believe that Intel DECIDED to throw this philosophy out the window and PAY someone else (TSMC) to make their chips? Link please. I can't fathom Intel making such a statement. It flies in the face of my 30+ years of following this industry.

I can certainly see Intel having a backup plan that produced their chips at TSMC; however, no one could have been so stupid not to be able to do the simple math that would show how costly and unprofitable this move would be. The very simplicity of understanding the financial issues with this move is why I simply can't agree that it was "planned".

With respect to how great Skymont is, are you sure? I believe that Skymont would not fare well in a DC application compared to Zen 5c. It would also not fare well in HPC workstations. In DC the "lots of weak cores" strategy fails under software licensing models. In workstation, it does better, but still comes down to higher performance within a platform (exe Thread ripper).

As for 13K and 14K still competing ... did they really? Looks to me like they did quite a bit more harm than good to the company. Besides, focusing on desktop with this "no holes barred" performance approach is crazy. It is a shrinking market and is much smaller than laptop and DC .... as well as having lower margins (all but the gaming segment).

For a given area, you believe Zen 5c is more performant in DC than Skymont?

moinmoin · Friday at 12:51 PM

OneEng2 said:
Are you saying that you believe that Intel DECIDED to throw this philosophy out the window and PAY someone else (TSMC) to make their chips? Link please. I can't fathom Intel making such a statement. It flies in the face of my 30+ years of following this industry.

Intel's CEO Says Using Competitor's Process Tech In Intel Fabs Is an Option

Intel CEO Bob Swan outlines Intel's plans for 2021

www.tomshardware.com

It wasn't long after that that Swan was gone and Pat installed. But the contracts with TSMC were already signed at that point.

OneEng2 said:
I can certainly see Intel having a backup plan that produced their chips at TSMC; however, no one could have been so stupid not to be able to do the simple math that would show how costly and unprofitable this move would be. The very simplicity of understanding the financial issues with this move is why I simply can't agree that it was "planned".

It's not a backup plan if it doesn't work. So Intel had to secure the amount of capacity it would need for it to work. That's what Pat is using up as we speak while he started bad-talking about TSMC before backpedaling from that.

OneEng2 · Friday at 4:42 PM

moinmoin said:
Intel's CEO Says Using Competitor's Process Tech In Intel Fabs Is an Option

Intel CEO Bob Swan outlines Intel's plans for 2021

www.tomshardware.com

It wasn't long after that that Swan was gone and Pat installed. But the contracts with TSMC were already signed at that point.

It's not a backup plan if it doesn't work. So Intel had to secure the amount of capacity it would need for it to work. That's what Pat is using up as we speak while he started bad-talking about TSMC before backpedaling from that.

The very nature of the article, and your post is that Intel "had to". The article repeatedly says things like "in the wake of" and "Unfortunately, as Swan expanded on in response to my question, outsourcing some chip production could expose Intel to possible supply issues, and naturally, outsourcing production could lead to lower margins".

Intel didn't "decide" to change its corporate strategy. Intel used the only card left in its deck of tricks and paid out the nose to prevent further market share slippage (although I am not certain even their current path is going to stop the slide at this point).

And yes, Pat G came in and reversed course. The direction Swan went to plug the hole made it clear that continuing on that path was suicide from a financial perspective. Pat G simply put the original strategy back in place.

Now ...... the real question is, does this make any sense? If Moore's law is dead .... and I think we can all agree that it most certainly is, then does it make sense for a business model of full vertical integration like Intel to exist .... or is it simply too expensive.

IF it is too expensive (and I certainly believe it is), then what does that mean for the future of processors? Without doubling the transistor count every 18 months, but rather every 10 years (or perhaps halting and hitting a brick wall for 20 years or more), how do companies like AMD and Intel (and others for that matter as the problem isn't specific to x86) continue to differentiate themselves?

Food for thought.

Markfw · Friday at 4:59 PM

OneEng2 said:
The very nature of the article, and your post is that Intel "had to". The article repeatedly says things like "in the wake of" and "Unfortunately, as Swan expanded on in response to my question, outsourcing some chip production could expose Intel to possible supply issues, and naturally, outsourcing production could lead to lower margins".

Intel didn't "decide" to change its corporate strategy. Intel used the only card left in its deck of tricks and paid out the nose to prevent further market share slippage (although I am not certain even their current path is going to stop the slide at this point).

And yes, Pat G came in and reversed course. The direction Swan went to plug the hole made it clear that continuing on that path was suicide from a financial perspective. Pat G simply put the original strategy back in place.

Now ...... the real question is, does this make any sense? If Moore's law is dead .... and I think we can all agree that it most certainly is, then does it make sense for a business model of full vertical integration like Intel to exist .... or is it simply too expensive.

IF it is too expensive (and I certainly believe it is), then what does that mean for the future of processors? Without doubling the transistor count every 18 months, but rather every 10 years (or perhaps halting and hitting a brick wall for 20 years or more), how do companies like AMD and Intel (and others for that matter as the problem isn't specific to x86) continue to differentiate themselves?

Food for thought.

I believe that (In respect to double transistor count) that has happened several times in the past BECAUSE they were able to based on process tech. Just for the sake of round numbers it went from 64 to 32 to 16 to 8 to 8 due to the size of the transistors. When you get to the size they are getting to be, this is not possible anymore. Not sure the exact sizes not that the tech has changed to things like "Intel 7" and Intel 10 and 18a and 20a vs things like 64nm and 32m (just again as examples) I can't remember the exact sizes now, so forgive me, but you get the idea. And now we have Things like "Zen5" and "Zen5c" where the transistor counts are not exact but very close and the only difference is a little less cach, but denser cores. This was not possible 10 years ago.

ajsdkflsdjfio · Friday at 5:10 PM

OneEng2 said:
Now ...... the real question is, does this make any sense? If Moore's law is dead .... and I think we can all agree that it most certainly is, then does it make sense for a business model of full vertical integration like Intel to exist .... or is it simply too expensive.

IF it is too expensive (and I certainly believe it is), then what does that mean for the future of processors? Without doubling the transistor count every 18 months, but rather every 10 years (or perhaps halting and hitting a brick wall for 20 years or more), how do companies like AMD and Intel (and others for that matter as the problem isn't specific to x86) continue to differentiate themselves?

Food for thought.

Moore's law is dead (transistor scaling no longer as fast) but process technology still matters, why do you think Samsung foundry is struggling so bad right now, is it cause Moore's law is dead and transistor count no longer matters? What led up to intel's current position losing market share in every segment was it because moore's law is dead and process leadership no longer matters? Process leadership still matters and improvements in transistor technologies are still significant not to mention the fact that pure scaling of transistors is not the only way to innovate in the chip making process, things like the myriad of advanced packaging techniques, alternative substrate materials like glass, new product design philosophies like chiplets ETC. are obviously still going to make a big difference when it comes to differentiating between companies in the future of processors.

On the note of foundries isn't intel straying away from a full vertical integration ideology by attempting to open up their foundries? If intel is successful in their attempt to at least make a viable alternative to TSMC and Samsung then I'd say it's worth it. Besides their vertical integration is only now too expensive because they have fallen behind in both process leadership and product design leading to decreased market share and revenue. To play catchup in their process technology and continue to compete close to the level of TSMC they have to open up foundries. If intel is able to both deliver on their promised nodes and provide sufficient capacity to make enough money to keep the foundry afloat and fund future growth, then Intel will be in a good place.

The very nature of the article, and your post is that Intel "had to". The article repeatedly says things like "in the wake of" and "Unfortunately, as Swan expanded on in response to my question, outsourcing some chip production could expose Intel to possible supply issues, and naturally, outsourcing production could lead to lower margins".

Its not that intel "had to", it's that Bob Swan thought Intel "had to". There is an argument now that intel no longer has to outsource production to TSMC for a large share of their future products. I think it'll take a while to see whether Pat Gelsinger's vision comes to fruition as these things take years or even up to a decade to fully realize, but I think if Pat was CEO back when the decision to outsource to TSMC was to be made, arrow lake would not have been outsourced to TSMC whether for better or worse.

OneEng2 · Friday at 5:11 PM

Markfw said:
I believe that (In respect to double transistor count) that has happened several times in the past BECAUSE they were able to based on process tech. Just for the sake of round numbers it went from 64 to 32 to 16 to 8 to 8 due to the size of the transistors. When you get to the size they are getting to be, this is not possible anymore. Not sure the exact sizes not that the tech has changed to things like "Intel 7" and Intel 10 and 18a and 20a vs things like 64nm and 32m (just again as examples) I can't remember the exact sizes now, so forgive me, but you get the idea. And now we have Things like "Zen5" and "Zen5c" where the transistor counts are not exact but very close and the only difference is a little less cach, but denser cores. This was not possible 10 years ago.

... and I think this is a taste of things to come. If you can't count on doubling of the TLB, cache, execution units, etc, etc, because you don't have much more of a transistor budget, you have to start being creative with ideas like Zen 5/Zen 5c or Lion Cove/Skymont or AI core and GPU core components.

In other words, you start making custom cores that are more specialized to certain tasks, and use a scheduling mechanism to route those tasks/instructions, etc to the right cores that are best suited to the task.

Intel really just took a page out of AMD strategy. Once upon a time, processors were rated in Hz and people were trained throughout the world to equate Hz to performance. AMD started with the "Model Number" to get out of Intel's insane push to the mythical 10Ghz processor .

Now naming the nodes with a model number is in vogue. Even we here that are geeks to the core have difficulty deciding what process is "better". Is Intel 3 better or worse than N3E? N3P? How about Intel 18A and TSMC N2? Not so clear cut anymore.

OneEng2 · Friday at 5:21 PM

ajsdkflsdjfio said:
Moore's law is dead (transistor scaling no longer as fast) but process technology still matters, why do you think Samsung foundry is struggling so bad right now, is it cause Moore's law is dead and transistor count no longer matters? What led up to intel's current position losing market share in every segment was it because moore's law is dead and process leadership no longer matters? Process leadership still matters and improvements in transistor technologies are still significant not to mention the fact that pure scaling of transistors is not the only way to innovate in the chip making process, things like the myriad of advanced packaging techniques, alternative substrate materials like glass, new product design philosophies like chiplets ETC. are obviously still going to make a big difference when it comes to differentiating between companies in the future of processors.

On the note of foundries isn't intel straying away from a full vertical integration ideology by attempting to open up their foundries? If intel is successful in their attempt to at least make a viable alternative to TSMC and Samsung then I'd say it's worth it. Besides their vertical integration is only now too expensive because they have fallen behind in both process leadership and product design leading to decreased market share and revenue. To play catchup in their process technology and continue to compete close to the level of TSMC they have to open up foundries. If intel is able to both deliver on their promised nodes and provide sufficient capacity to make enough money to keep the foundry afloat and fund future growth, then Intel will be in a good place.

Its not that intel "had to", it's that Bob Swan though Intel "had to". There is an argument now that intel no longer has to outsource production to TSMC for a large share of their future products. I think it'll take a while to see whether Pat Gelsinger's vision comes to fruition as these things take years or even up to a decade to fully realize, but I think if Pat was CEO back when the decision to outsource to TSMC was to be made, arrow lake would not have been outsourced to TSMC.

Intel has to open up their foundries because the business case for EXCLUSIVE vertical integration doesn't make sense. The exponentially rising cost of new nodes requires the cost be spread across a larger number of chips from a larger number of companies and that the equipment be used forever (or nearly so). Intel used to sell off its older equipment and outsource low priced, non-leading edge chips to other companies while making the bread and butter on its one high quality cutting edge processes.

Of course, Intel isn't doing this in a vacuum. TSMC has become very adept at creating chips for design companies ..... and TSMC isn't a "frienemey" to them either (they aren't a competitor) like Intel. Even if Intel manages to pull off 18A for themselves, I suspect the cost is prohibitive without other companies using the foundry as well. If 18A isn't as good as TSMC N2 then Intel will have big price pressure on them for their 18A wafer costs as they may have to charge TSMC N3 prices for their leading edge (and very expensive) process node.

Regardless, Intel has to do this, or give up the foundry completely IMO.

ajsdkflsdjfio · Friday at 5:28 PM

OneEng2 said:
Intel really just took a page out of AMD strategy. Once upon a time, processors were rated in Hz and people were trained throughout the world to equate Hz to performance. AMD started with the "Model Number" to get out of Intel's insane push to the mythical 10Ghz processor .

Now naming the nodes with a model number is in vogue. Even we here that are geeks to the core have difficulty deciding what process is "better". Is Intel 3 better or worse than N3E? N3P? How about Intel 18A and TSMC N2? Not so clear cut anymore.

I don't really get what you're trying to say here. Yea sure Hz is not as big of a measure of performance in people's minds as it was back then but it still matters, as does IPC which also existed back then. Also ur idea about naming nodes with "model numbers", intel hasn't named their nodes based on actual realistic measures of their transistor technology since 1995:

"Intel held the line from “10 micron” in 1972 through “0.35 micron” in 1995, an impressive 23-year run where the node name matched gate length. Then, in 1997 with the “0.25 micron/250 nm” node they started over-achieving with an actual Lg of 200 nm – 20% better than the name would imply. This “sandbagging” continued through the next 12 years, with one node (130nm) having Lg of only 70nm – almost a 2x buffer. Then, in 2011, Intel jumped over to the other side of the ledger, ushering in what we might call the “overstating decade” with the “22nm” node sporting an Lg of 26 nm."

Naming nodes with numbers that don't technically mean anything is not something new within the past 20 years. Determining what process is "better" is also not related to this discussion at all. The difficulty in determining what node is better than what is because now there is actual competition where Intel isn't the unquestionable leader, and TSMC, although clearly better, is not too far ahead from intel either in terms of pure process technology. In hobbyist discussion boards like this its just conjecture based on the limited marketing materials we have from Intel and TSMC so obviously there is some difficulty in distinguishing exactly how good one process is compared to another, although arguably there is already a decent enough hierarchy established by the more educated people here. Besides it's not hard for somebody actually in the industry or with an education in this field, it is perfectly clear cut to experts in the field and especially when products release which processes are better than others.

Markfw · Friday at 5:28 PM

OneEng2 said:
Intel has to open up their foundries because the business case for EXCLUSIVE vertical integration doesn't make sense. The exponentially rising cost of new nodes requires the cost be spread across a larger number of chips from a larger number of companies and that the equipment be used forever (or nearly so). Intel used to sell off its older equipment and outsource low priced, non-leading edge chips to other companies while making the bread and butter on its one high quality cutting edge processes.

Of course, Intel isn't doing this in a vacuum. TSMC has become very adept at creating chips for design companies ..... and TSMC isn't a "frienemey" to them either (they aren't a competitor) like Intel. Even if Intel manages to pull off 18A for themselves, I suspect the cost is prohibitive without other companies using the foundry as well. If 18A isn't as good as TSMC N2 then Intel will have big price pressure on them for their 18A wafer costs as they may have to charge TSMC N3 prices for their leading edge (and very expensive) process node.

Regardless, Intel has to do this, or give up the foundry completely IMO.

Years ago it was said that soon, we will run out of making nodes smaller when transistors became so small it was impossible, like 3 atoms make a transistor and you can't go smaller. Not being an expert here, is that type of thing that we will hit that wall soon ?

ajsdkflsdjfio · Friday at 5:36 PM

OneEng2 said:
Intel has to open up their foundries because the business case for EXCLUSIVE vertical integration doesn't make sense. The exponentially rising cost of new nodes requires the cost be spread across a larger number of chips from a larger number of companies and that the equipment be used forever (or nearly so). Intel used to sell off its older equipment and outsource low priced, non-leading edge chips to other companies while making the bread and butter on its one high quality cutting edge processes.

Yes EXCLUSIVE vertical integration no longer makes sense not because transistor technology innovations are slowing down, but because Intel has lost transistor leadership and market share. If they still had the market share and had the same amount of process leadership as they had in let's say early 2000s, it doesn't matter whether transistors are doubling every 1 year or every 100 years, Intel's vertical integration would still make sense because they have such a hold on the market that their own business is enough to keep foundry afloat. It's not that the cost has to be spread across a larger number of chips, it's that intel no longer has such a market hold that only making their own product is enough to fund foundry efforts in the long term.

Even if Intel manages to pull off 18A for themselves, I suspect the cost is prohibitive without other companies using the foundry as well. If 18A isn't as good as TSMC N2 then Intel will have big price pressure on them for their 18A wafer costs as they may have to charge TSMC N3 prices for their leading edge (and very expensive) process node.

Which is exactly why they are pushing for companies to use their nodes, and why there is a 15bn deal from customers over the next few years to use intel foundry, although IDK if that's good enough or not, probably not. Intel 18A doesn't need to be as good as N2 anyways, TSMC prices are pretty exorbitant right now and there is a real demand for close to leading edge wafer capacity. If you look at TSMC earnings reports, their leading edge node I.E n3 is not even the bulk of their earnings, if you look at TSMC q3 2024 earnings report, N5 is the biggest part of their foundry business with 32% of the share. If intel is able to prove that they have the technology and capacity, there are plenty of willing customers to pay for a node that isn't quite up to N2. The prices wouldn't have to be charged at N2 levels either, N2 prices are so high NOT because N2 costs that much to develop/produce, they are that high because of market demand and TSMC's position as the sole producer of leading edge nodes for external customers currently. Without working at intel and being an expert in their financials, neither you nor I can accurately predict how much intel has to charge for their 18A process and how economical their 18A process even is in the first place. I don't know why you're making the assumption that 18A costs just as much as N2 to produce and that if they charged lower prices than TSMC N2 they would somehow be in trouble. The fact is they are require to charge lower prices than TSMC anyways, and I'd say have a good chance at making a profit despite that as TSMC wafer costs are skyrocketing for reasons other than pure production costs, charging less than TSMC levels does not equal a loss.

511 · Friday at 9:54 PM

Markfw said:
Years ago it was said that soon, we will run out of making nodes smaller when transistors became so small it was impossible, like 3 atoms make a transistor and you can't go smaller. Not being an expert here, is that type of thing that we will hit that wall soon ?

We are going to do different geometry and different Innovation before hitting a wall but it is going to become real hard and Intel already bet on High-NA whether it pays off or not we have to see

Imec's chip scaling roadmap: smaller, better, faster | imec

To handle the growing amounts of data in a sustainable way, we need improved high-performance semiconductor technology. And address five challenges simultaneously.

www.imec-int.com

DavidC1 · Friday at 10:32 PM

Markfw said:
Years ago it was said that soon, we will run out of making nodes smaller when transistors became so small it was impossible, like 3 atoms make a transistor and you can't go smaller. Not being an expert here, is that type of thing that we will hit that wall soon ?

We're nowhere near 10 atoms in size, heck it's multitudes bigger than that. They'll realistically never get anywhere near below 10nm size for the whole device size, despite whatever they want to name it. Heck, they could call it 1 Angstrom, but still be >10nm in size, but with fancy things(GAA, nanosheets, stacked P/N, etc).

ajsdkflsdjfio said:
Then, in 2011, Intel jumped over to the other side of the ledger, ushering in what we might call the “overstating decade” with the “22nm” node sporting an Lg of 26 nm."

22nm was 2012. Sandy Bridge was 32nm in early 2011. Then 22nm Ivy Bridge came in mid-2012.

@Markfw 15-20nm is the actual real minimum size of current transistors. The rejigging of the transistor structure is trying to get the benefit while not actually going below the size, because they can't manufacture something much smaller than 15-20nm, except for very specific structures.

In 65nm, the gate dielectric was 1nm, and it was too small and thus contributed to a lot of leakage. So they used a High-K material in 45nm, but the actual thickness was 3nm, lot larger. But the different characteristic meant that the 3nm had the performance better than 1nm thus they used "Equivalent Oxide Thickness", meaning its thicker but it performs like a previous thinner one.

In 22nm, they couldn't make the gate smaller, so they flipped the transistor and put it on it's side, so now you have 3 gates contacting the channel. Thus, you get the benefit of smaller gate without needing to get it smaller. And since it's 3 gates surrounding the channel, Intel called it "Tri-Gate". Gate All Around, or GAA is 4 gates. The benefit is less than going to "Tri Gate" for obvious reasons, but is the ultimate gate.

adroc_thurston · Friday at 11:39 PM

DavidC1 said:
but is the ultimate gate.

them are CFETs.

RTX · Friday at 11:48 PM

511 said:
We are going to do different geometry and different Innovation before hitting a wall but it is going to become real hard and Intel already bet on High-NA whether it pays off or not we have to see

Imec's chip scaling roadmap: smaller, better, faster | imec

To handle the growing amounts of data in a sustainable way, we need improved high-performance semiconductor technology. And address five challenges simultaneously.

www.imec-int.com

View attachment 112020

If they introduce zero diffusion breaks, they can scale a bit further.

ajsdkflsdjfio · Saturday at 1:25 AM

RTX said:
If they introduce zero diffusion breaks, they can scale a bit further.

what are b, c, and d depicting?

511 · Saturday at 1:27 AM

ajsdkflsdjfio said:
what are b, c, and d depicting?

Those are just figure a,b,c

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