Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

Senior member
Apr 1, 2022
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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E012 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4TSMC N3BTSMC N3BIntel 18A
DateQ4 2023Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P8P + 16E4P + 4E4P + 8E
LLC24 MB36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



 

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OneEng2

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Sep 19, 2022
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View attachment 117240

(I will no longer be posting X links, only screenshots.)



PTL P core is average. 18A good.
I suspect that Panther and Nova will have only relatively small IPC improvements over current generation .... simply because 18A is not considerably more dense than N3B. Still, if Intel uses the extra 10% transistor budget wisely, and cleans up that God Awful ring bus latency, I would expect between 10-15% IPC over Lunar and Arrow. With Arrow, I am a little concerned about clock speed limitations though due to hot spots associated with BSPDN.
 

jdubs03

Golden Member
Oct 1, 2013
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By now only masochists should be bullish on Intel nodes, since they win either way.
They have to prove that they can do it. And if they do? Then are you going to give them some credit? Based on publicly available information, 18A will be competitive if not ahead in shipping products.
 

511

Golden Member
Jul 12, 2024
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I am not disputing anything, but where does it say this on that post ? I do not see it here .
It indirectly implies it and the post before that as well.
N3B is denser than N3E also Cougar Cove is a tick of Lion Cove so a core is smaller on 18A than N3B implies 18A is a bit denser than N3B so the area is good Power Performance characteristics will be known by reviews.

Also SPIE/ISSCC this month has update with TSMC N2/18A and High NA.
 
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I know probably discussed here before but Panther Lake with Cougar Cove and Nova Lake with Panther Cove, it would've made more sense to call the former Cougar Lake and the latter Panther Lake and use Nova for some future design. Like how do a bunch of people with above average IQ end up agreeing on these things???
 
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Magio

Member
May 13, 2024
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I know probably discussed here before but Panther Lake with Cougar Cove and Nova Lake with Panther Cove, it would've made more sense to call the former Cougar Lake and the latter Panther Lake and use Nova for some future design. Like how do a bunch of people with above average IQ end up agreeing on these things???

The most likely thing IMO is Panther Cove was initially meant to be ready for PTL, but missed some development targets and was pushed to NVL. I expect they didn't bother changing the development codename but will change the consumer facing one.
 

DavidC1

Golden Member
Dec 29, 2023
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Sigh....
No E core testing 🥲.It's A0 they are at b0 stepping.
It doesn't really matter. The P cores are supposed to get greater gain than the E. I know it's not saying a lot, because E's are supposed to be 3-5% and P's are 7-10%(or 6-8%) or something.
Still, if Intel uses the extra 10% transistor budget wisely, and cleans up that God Awful ring bus latency,
What happens when there's no real innovation or ideas since Sandy Bridge, the very generation that introduced the Ring Bus.
 
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DavidC1

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Dec 29, 2023
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2025 is going to be another MEH year for x86 CPUs
For decades Intel has protected themselves through artificial barriers called the x86 license and lawyers. And because for a time they were financially successful and were a darling of the semi world, it was the first choice for chip talent to go work for.

Here's a problem with artificial barriers. It breeds contentment and laziness, because those inside the bubble believe they are invulnerable.

Instead, the world came to realize they didn't need to penetrate the barrier, rather circumvent it with a totally new category, and that's what Apple did with the revolutionary iPhone.

The technical reasons that people argued for decades about x86 vs ARM and which ISA is superior doesn't matter. The perception seems to matter as much, if not more. It seems with Intel's recent faltering we may see the winner of the 4 decade-long ISA battle emerge. And I don't need to say what that is.
 
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poke01

Diamond Member
Mar 8, 2022
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This is what loosing design leadership looks like. On desktop Intel just throws more power at the problem, problem with laptops is that you cannot without looking silly.

Oh and that is Cinebench R23, not CB 2024 and the 285H still loses to the M4 Pro.

Also MSI is a horrible laptop maker
 
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511

Golden Member
Jul 12, 2024
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Both of you are right but in 2026 AMD/Apple will be using N2 for their design we would have a iso node comparison by than.
We don't have big APU on Intel side until NVL with Xe3P and I hope they don't cancel it.
 
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Geddagod

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Dec 28, 2021
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The most likely thing IMO is Panther Cove was initially meant to be ready for PTL, but missed some development targets and was pushed to NVL. I expect they didn't bother changing the development codename but will change the consumer facing one.
I swear there was an interview with an architect of GLC a couple years ago where they made some claim that in the next couple years there were gonna be some large consecutive IPC uplift archs from Intel, wonder whatever happened to that.
It doesn't really matter. The P cores are supposed to get greater gain than the E. I know it's not saying a lot, because E's are supposed to be 3-5% and P's are 7-10%(or 6-8%) or something.
I highly doubt the P-cores get that large of an uplift. I don't even think the P-cores will get a greater gain than the E-cores. At best I think uncore changes might net decent IPC gains in some applications, but other than that....
 
Jul 27, 2020
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I swear there was an interview with an architect of GLC a couple years ago where they made some claim that in the next couple years there were gonna be some large consecutive IPC uplift archs from Intel, wonder whatever happened to that.
Raptor Lake degradation happened and he probably thought that no way Intel would abandon monolithic architectures but they did and now he's just scribbling at his desk every day, like a madman, improving his unreleased designs.
 
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511

Golden Member
Jul 12, 2024
1,740
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I swear there was an interview with an architect of GLC a couple years ago where they made some claim that in the next couple years there were gonna be some large consecutive IPC uplift archs from Intel, wonder whatever happened to that.

I highly doubt the P-cores get that large of an uplift. I don't even think the P-cores will get a greater gain than the E-cores. At best I think uncore changes might net decent IPC gains in some applications, but other than that....
Some instructions in LNC have increased latency so they should address that as well with cougar cove plus few changes to the branch prediction and uncore should make for 5-8% IPC Increase which is fine
 

Geddagod

Golden Member
Dec 28, 2021
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Some instructions in LNC have increased latency so they should address that as well with cougar cove plus few changes to the branch prediction and uncore should make for 5-8% IPC Increase which is fine
Intel has not had a "tick" core uplift that large since like, when? Idk. I find it super hard to believe
 
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