AMD engineers claimed they under-achieved their Zen 4 Fmax goals. I don't think, unless AMD increased nT power draw for Zen 5 while keeping the all core boost of Zen 4 arbitrarily low, Zen 5 was going to be a large upgrade in traditional nT perf.Conversely, I'm convinced Zen5 was as good as AMD hoped... when they started its design. The problem for them, which has tainted OUR perception was that Intel actually did have a last hurrah, with the recent Lakes, and both companies realised they would have to push their chips HARD to compete. Zen4, IMO, was pushed way harder than AMD originally intended, to compete with 13/14 series. So much so that it crossed the performance line into plannrd Zen5 territory, a generation earlier.
Zen 5 server also increase core counts and has a new IO die. Idk if that's proof.Kinda proof can be seen in how AMD have managed Epyc. Zen5 in that environment is a good 30-50% faster, cos it clocks easier across the board. I dunt think AMD originally wanted their first AM5 chips to instantly draw the full wattage the new socket could provide. But then they wouldn't have been competitive with Intels furnace inducing, self destructing chips. Ho hum.
Perhaps early prep for Zen 6, which is rumored to increase CCX core count.They needed something scalable for CCXes having 16 (and probably 32) cores. So this makes sense but having such CCX benchmarked would be great.
I agree. I think Zen 5 was likely planned on some variant of N3 but since it wasn't ready in time, Zen 5 needed to be backported to N4 and the reduced xtor budget meant some things needed to be axed. Hopefully, those things and more come back with Zen 6.AMD engineers claimed they under-achieved their Zen 4 Fmax goals. I don't think, unless AMD increased nT power draw for Zen 5 while keeping the all core boost of Zen 4 arbitrarily low, Zen 5 was going to be a large upgrade in traditional nT perf.
I don't think Zen 5 is a bad uplift totally, but it's not on par with what AMD achieved with Zen 3 (core wise). Maybe because their base with Zen 4 was already so good. The Zen 5>Zen 4 PPA uplift seems more in line with Intel's Cove uplifts than Zen 3>Zen 4.
Comparing the GLC vs WLC and the Zen 5 vs Zen 4 uplift is going to be pretty interesting, if anyone can find data on a GLC vs WLC power curve (I have yet to seen anything with this data).
Zen 5 server also increase core counts and has a new IO die. Idk if that's proof.
Turin-Dense has a single 16-core CCX per CCDPerhaps early prep for Zen 6, which is rumored to increase CCX core count.
Someone remind me if Zen 5 dense is one or two CCXs? Wasn't Bergamo 2 CCXs?
1Someone remind me if Zen 5 dense is one or two CCXs?
guess what they solved with Turin-D.Wasn't Bergamo 2 CCXs?
yes but we're talking same CC SKUs.Zen 5 server also increase core counts and has a new IO die
I agree. I think Zen 5 was likely planned on some variant of N3 but since it wasn't ready in time, Zen 5 needed to be backported to N4 and the reduced xtor budget meant some things needed to be axed. Hopefully, those things and more come back with Zen 6.
Bruh Apple uses a ton of capacity the initial capacity is usually booked by apple and N2 is yet to rampI think so to. And AMD can, in theory make a "Zen 5+", put in all the things that were cut and then some, call it "Zen 6" and release it earlier than expected. Such as Mid 2026.
AMD already has a template for the IODs / SoCs in Strix Halo...
TSMC is already scheduled to be processing 50,000 to 80,000 N2 wafers by the end of 2025. So N2 capacity is coming online quickly, and Apple is unlikely to use is for new iPhone in 2026.
Bruh Apple uses a ton of capacity the initial capacity is usually booked by apple and N2 is yet to ramp
Apple pre-pays advanced node expansion, maybe this time Nvidia outbid them but it seems to me that for Apple to miss such an important node would be unthinkable - they did N3B and N2 can't be any worsethere were rumors that Apple will not use N2 for 2026 mode iPhone
Apple pre-pays advanced node expansion, maybe this time Nvidia outbid them but it seems to me that for Apple to miss such an important node would be unthinkable - they did N3B and N2 can't be any worse
This wouldn't be a first that such a large difference would exist between the pro and non-pro line. The iPhone 15 had A16 Bionic and the iPhone 15 Pros had A17 Pro, and there was a similar difference with the iPhone 14, which had A15 while the iPhone 14 Pro had the A16 Bionic.It is still only a speculation, that only iPhone "Pro" models will use N2. and higher volume lower end models will not.
Did you read what I posted? TSMC is expected to be processing 50k to 80k wafers per month by the end of 2025 (meaning, it will be ramping capacity substantially for 2026)
only if the yield is good the yield is initially not that high it increases during process ramp up and i don't think all the designs are ~115mm2 the only chips around that are Zen6 CCD(expecting around 90-100 mm2) and A20 SOC.They are actually targeting 100k/month for december according to a TSMC employee, but would be content with 50-80k as a worst case, 100k/month would be enough for 40M 150mm2 chips/month, almost 1bn/year, so unless Apple manage to take 100% of the smartphones marketshare they dont need that much waffers, at most 20% would be more than enough, and even at 50k/month they wouldnt need more than 40% of the output.
only if the yield is good the yield is initially not that high it increases during process ramp up and i don't think all the designs are ~115mm2 the only chips around that are Zen6 CCD(expecting around 90-100 mm2) and A20 SOC.
My bad lol I mixed up the numbers.I wrote 150mm2, not 115.
That quoted density is wrong I would assume something in line 250mxtor/mm2 for the correct N2 density considering it's 215mxtor/mm2 for N3E and N2 is 1.15 times the density N4 density is 143mxtor/mm2 and N5 is 135 mxtor/mm2.That s enough area for quite complexe chips given the augmented density vs previous nodes, they said density is 313M/mm2, that s 2x the density of the N4 based 9070XT GPU, beside at 50k/month they cant afford to have 50% yields, they would reduce the flow the necessy time to correct the hardware rather than manufacturing excess scraps, so they seems confident on their capabilities.
I wrote 150mm2, not 115.
That s enough area for quite complexe chips given the augmented density vs previous nodes, they said density is 313M/mm2, that s 2x the density of the N4 based 9070XT GPU, beside at 50k/month they cant afford to have 50% yields, they would reduce the flow the necessary time to correct the hardware rather than keeping manufacturing excess scraps, so they seems confident in their capabilities.
Depends on the CCD and we are assuming AMD will keep Growing it will only take 1 good Intel gen to sway everything back.And how many would AMD need if Zen 6 were to ramp instantly?
Total market of optimistically 25 million per month, and optimistically AMD has 40% market share in 2026, and of that again optimistically, 50% are premium chips.
That would be 5 million Zen 6 chips per month which are estimated to be 75 mm2. How many wafers would it take to supply the client? (Server would be separate).
AMD has been strong and dominent for years, and especially in servers. And you think one Intel generation will take it all away ? Yea right...Depends on the CCD and we are assuming AMD will keep Growing it will only take 1 good Intel gen to sway everything back.
Still in denial stage?Depends on the CCD and we are assuming AMD will keep Growing it will only take 1 good Intel gen to sway everything back.
Depends on the CCD and we are assuming AMD will keep Growing it will only take 1 good Intel gen to sway everything back.
I meant the Desktop.Servers are different game where AMD will keep taking shareAMD has been strong and dominent for years, and especially in servers. And you think one Intel generation will take it all away ? Yea right...
Just stay in your Intel threads.
I meant the Desktop servers are different game where AMD will keep taking share
Yeah but their DC revenue includes MI which is almost a Billion $ as well Intel's is mostly CPU their AI Product doesn't even put out good number it just sucks.AMD is earning more in datacenter than Intel for the first time ever. That isn't "Desktop servers".
Thats NOT what you said. You said (and I quote) " it will only take 1 good Intel gen to sway everything back."I meant the Desktop.Servers are different game where AMD will keep taking share