Broadwell, Crystal Well etc. showed that it can matter for certain applications especially with limited data sets that need to do repetitive computations, like game engines.MALL only makes sense for GPUs.
Good news everyone! V$ exists.Broadwell, Crystal Well etc. showed that it can matter for certain applications especially with limited data sets that need to do repetitive computations, like game engines.
Yeah but we need 512MB of that. At least I won't be satisfied till that happens.Good news everyone! V$ exists.
no you don't.Yeah but we need 512MB of that.
Too many sets for too many pains. Do not.At least I won't be satisfied till that happens.
In general, the miss rate on a last level cache halves as the size of the cache quadruples. For example, if your hit rate on a 512Kb cache was 90%, your miss rate would be 10%. If you doubled that cache twice, to 2 MB, you would improve the miss rate to 5% and the hit rate to 95%. It would make a noticeable difference only in programs that have a hot working set that now fits in the expanded cache, but spilled before. Those are very general numbers for x86 code as the effect is still HIGHLY dependent on the hot working set size of each program.Yeah but we need 512MB of that. At least I won't be satisfied till that happens
This should be exposed as a BIOS option and let the users make that call. I personally have no issue burning a few extra watts for maximum performance.Eventually, you just aren't making any useful impact in working set latencies and will have to resort to LOTS of predictive extra data loads from main memory to attempt to preload the cache with data that you think that the program will need next. This burns up a lot of energy making memory calls that are often unneeded.
It should be available on AM5. Usually the option can be found from AMD specifc menu but your mileage may vary, depending on the manufacturer.I vaguely remember from long ago that there were processors that had bios settings where you could turn cache prefetch on and off. It's been a minute, I've slept since then, and there may have been an alcohol or two in my system along the way, so that's about all I have at the moment.
Guess I'll find out when I get my 9900X up and running, provided some gremlin doesn't steal it on its way to me.It should be available on AM5. Usually the option can be found from AMD specifc menu but your mileage may vary, depending on the manufacturer.
how do we get the document?
Bottom line, which is better, 18a or N2 ?from techtechpotato stream or somebody shared a link to japanese site around the same time, that reprinted most of the slides if I remember correctly. In the stream you have both the article (skip backward) and the presentation slides.
With all of this said, if AMD gave us the option to have 3D V-Cache on both CCDs so that we could avoid having one set of lower cache and one set of higher cache cores, I think a lot of folks would be interested.
I went ahead and tried out on-CPU AI performance, mostly just for the fun of it. Armed with 64GB of RAM, I was able to test deepseek-r1:32b at an average token rate of 3.346 tokens/s.
But... anyone who thinks they want that is ignorant and a fool.With all of this said, if AMD gave us the option to have 3D V-Cache on both CCDs so that we could avoid having one set of lower cache and one set of higher cache cores, I think a lot of folks would be interested.
But... anyone who thinks they want that is ignorant and a fool.
That you feel singled out here is extremely telling.I never said that. I know a lot of people want to see it. I just don't think it'll end up resulting in what they expect.
Look at the 9950X3D. It's no better in productivity than a 9950X in just about everything. Why would a dual Vcache version be any different? It would just be a waste of Vcache when AMD can't keep them in stock.
Determinism.Btw, for people who would like to have 2 x3D CCDs, what are your expectations? What would be better in your opinion?