Discussion Apple Silicon SoC thread

Eug · Nov 10, 2020

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:

M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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M4 Family discussion here:

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johnsonwax · Mar 18, 2025

mvprod123 said:
Figure 1 shows the Mac mini, which was launched on November 8, 2024. Compared to its predecessor, the device's maximum volume has been reduced from 1389mm³ to 807mm³, and its weight has decreased from 1.28kg to 0.73kg—a reduction of approximately 40%. The device is now compact enough to fit in the palm of a hand.

So, this is something I know from 'people'.

In the era of the original Mini, which coincided with Apple pushing for an end to physical media and a push away from desktops to laptops like the Air, a lot of Apples focus was on gaining supply chain advantages. This was roughly the period when the iPhone launched.

One advantage Apple thought they could get, and it was something they knew they would need if the iPhone took off, was a shift from container shipping and having 30-60 days of inventory (even if that inventory was locked up in a container ship and not held as inventory) to air freight and having 3-6 days of inventory. This affected a wide range of operations, including the ability to use Apple retail stores as warehouses. Consider that many of Apple's flagship stores do 1-3M in sales per day, sometimes in a 10,000sq ft store and consider the warehousing and logistics challenges in that.

One of their approaches to this was to aggressively shrink the physical size of the product, including packaging. Cutting the product in half volume wise means twice as many units in a ULD, half as many trucks, and twice as much inventory in a storeroom, and potentially passing the crossover point from containerized sea freight to air freight costs. Remove physical media and Apple can remove that whole section from their physical stores, as well as the volume in the product taken up by a DVD drive. When the original Mini came out, people thought the 3.5" hard drive was a bad decision because they were so much more expensive than the 5.25" drives at the time, but when you factored in packaging costs, shipping costs, warehousing costs, and the greater ability to turn over inventory which meant they were less likely to wind up with millions of units that customers don't want because they don't hold the product - it goes straight to customers in days not weeks, it wound up being cheaper for Apple to use the 3.5" drives than the retail cheaper 5.25" ones if it enabled those kinds of changes - which it did. Removing accessories like chargers from iPhone packaging has this additional benefit. And at volumes of hundreds of millions of units, it's not just a profitability thing, it's a 'can we reduce the delivery load enough that launch weekend doesn't overwhelm the global shipping industry'. That wasn't a problem back when they started this effort, but by 2012 it was.

Apple's continued aggressive reduction in component count is part of this overall strategy. Half as many parts is a supply chain which is half as complex and likely can move twice as fast. They have a particularly holistic strategy toward this stuff. How much of a simplification of supply chain and reduction of warranty repairs (put aside the cost and just consider the volume of people trying to access warranty service in their retail stores) was just eliminating the headphone jack?

repoman27 · Mar 18, 2025

Doug S said:
My understanding is that the chips in the NAND package are PCIe/flash bridges. They'd need a lot of wires for the full NAND interface that's typically required for a controller to talk to flash chips, so they are essentially tunneling that interface via PCIe.

I expect these guys are just confused by the custom Apple chip they see and for whatever reason are assuming it does more than it actually does.

The extra die in the NAND packages is Apple's custom Memory Signal Processing (MSP) chip:

Apple SSDs utilize multi-chip packages, each of which contain a single MSP (Memory Signal Processing) die along with 2 to 16 NAND flash memory dies. So far I’ve seen packages with 2, 4, 5, 8, 9, and 16 NAND dies. Some SSDs incorporate a single package with an extra NAND die resulting in the non-power-of-2 quantities of 5 and 9. This additional overprovisioning allows for larger pseudo-SLC (Single Level Cell) caches which improve performance and extend the useful life of the drive. While the NAND dies Apple uses are bog standard, the MSP is proprietary special sauce.

Like other memory types, NAND dies are connected via a highly multiplexed parallel interface. Apple uses the Toggle DDR (Double Data Rate) interface, a standardized bus that is 8 bits wide and transfers data on both the rising and falling edges of the signal waveform. Just as with DRAM, the key to achieving the highest capacities is connecting as many dies as possible to each bus. However, as you increase the number of dies per bus, the capacitive loading decreases signal integrity and makes achieving the maximum clock speeds impossible. Much like DRAM does with RDIMMs (Registered Dual In-line Memory Modules) and LRDIMMs (Load Reduced Dual In-line Memory Modules), the solution is to use buffer chips to mask the effect of loading. Samsung’s “F-chips” are one example of this type of frequency boosting interface chip.

Apple, however, developed their proprietary MSP in-house using IP and engineering talent gained through the acquisition of Anobit in 2011. Each of Apple’s MSPs supports two independent 8-bit Toggle DDR interfaces to which as many as 8 NAND dies can be attached. They utilize a PCIe Gen4 x1 link as transport between the NAND package and SSD controller, unlike simple buffer chips from other vendors which use ONFI or Toggle interfaces. To my knowledge this is completely unique, and it greatly simplifies routing, allows the NAND to be located much further from the controller, and reduces power usage. Were it not for this, the removable NAND modules in M-series Macs would look more like SO-DIMMs, with hundreds of pins rather than 72 to 76, and up to four modules would be needed to accommodate the 16-channel controllers in the Max and Ultra SoCs. The other party piece that Apple’s MSP technology delivers is what Anobit claimed prior to the acquisition as a 20x increase in NAND endurance. Not surprisingly, Apple must develop a new MSP to support each new type of NAND flash that they use. The MSP also underwent a minor revision between the original M1 models introduced in 2020 and subsequent M1 generation Macs released in 2021 and 2022.

The EE Times Japan article was written by Hiroharu Shimizu of TechanaLye Shimizu (@techanalye1 on X / Twitter). I'm pretty sure he knows what he's talking about, although some degree of nuance is likely lost by the machine translation from Japanese to English.

name99 · Mar 19, 2025

repoman27 said:
The extra die in the NAND packages is Apple's custom Memory Signal Processing (MSP) chip:

Very interesting! Thanks!!!

So would it be correct to say that analog signal processing is also happening in the MSP chip?
*Something* must be tracking the analog waveform (not least for purposes like soft decisions, or slightly shifting the read and write voltages), but obviously (?) that can't sit on the other side of a digital interface like PCIe.

Eug · Mar 19, 2025

Doug S said:
No it is a lot of bs.

Still crap based on what? Seems to be pretty competitive with Qualcomm modems. Not quite their equal performance wise but it is version 1.0 after all. Already better power wise which is what Apple highly values. Me too - 5G is already fast enough, given a choice between a faster modem and a more power efficient modem I want the latter.

It seems benchmarks of C1 are relatively favourable so far.

A First Look at How Apple’s C1 Modem Performs With Early Adopters | Ookla®

www.ookla.com

Aside from power usage, the most important metric for me is this one:

Much less important to me is peak speed.

Overall, C1 competes well.

Doug S · Mar 19, 2025

repoman27 said:
The extra die in the NAND packages is Apple's custom Memory Signal Processing (MSP) chip:

The EE Times Japan article was written by Hiroharu Shimizu of TechanaLye Shimizu (@techanalye1 on X / Twitter). I'm pretty sure he knows what he's talking about, although some degree of nuance is likely lost by the machine translation from Japanese to English.

So in other words, it is a PCIe to NAND interface bridge, just like I said it did. I'm not surprised that Apple's is the only one of these, because in pretty much any scenario that you have a PCIe interface available you will use it to connect a full SSD. Apple is the exception because they already have their own controller and won't pay twice for that.

The ONFI/toggle interface chips mentioned are for embedded devices like wireless routers where every penny in the BOM matters so they don't license PCIe or pay for a full SSD. They've probably licensed some bare minimum controller for their SoC, with crappy performance but you rarely write to your router's NAND so that doesn't matter.

repoman27 · Mar 19, 2025

Doug S said:
So in other words, it is a PCIe to NAND interface bridge, just like I said it did. I'm not surprised that Apple's is the only one of these, because in pretty much any scenario that you have a PCIe interface available you will use it to connect a full SSD. Apple is the exception because they already have their own controller and won't pay twice for that.

The ONFI/toggle interface chips mentioned are for embedded devices like wireless routers where every penny in the BOM matters so they don't license PCIe or pay for a full SSD. They've probably licensed some bare minimum controller for their SoC, with crappy performance but you rarely write to your router's NAND so that doesn't matter.

Apple paid half a billion for Anobit in 2011 so they could own their memory signal processing chips. They didn't add the SerDes and PCIe interface until much later, when they finally integrated their custom SSD controller into the A and M-Series SoCs. And I'm sure they paid Synopsys or whoever they bought that generic IP from considerably less.

Apple chose to use PCIe as the transport layer between their integrated SSD controller and NAND packages because they can't always place the NAND packages directly adjacent to the SoC. Using PCIe gives them the placement flexibility they need, greatly simplifies signal routing, and provides much better signal integrity.

Pretty much every NAND die has ONFI or Toggle interfaces, just as DRAM dies support one of the JEDEC interfaces like DDR or LPDDR. Therefore pretty much every SSD employs ONFI or Toggle buses between the controller and NAND. None of this really has anything to do with BoM cost or licensing, it's just how things are designed and engineered.

johnsonwax · Mar 20, 2025

Doug S said:
So in other words, it is a PCIe to NAND interface bridge, just like I said it did. I'm not surprised that Apple's is the only one of these, because in pretty much any scenario that you have a PCIe interface available you will use it to connect a full SSD. Apple is the exception because they already have their own controller and won't pay twice for that.

I don't think the issue is paying twice, I think the issue is that they already have all that cooling infrastructure on the SOC where the controller sits, and SSD cooling for high performance storage is turning into a thing because not many people want to pay or that kind of cooling infrastructure in the case. All indications are this is a trend that will only get worse, not better.

jdubs03 · Mar 20, 2025

Ha! That’s all I have to say.

Rumor Reversal: A20 Chip for iPhones Said to Use TSMC's 2nm Process

Earlier this week, the investment firm GF Securities shared multiple research notes regarding Apple's future chips. In one of these notes, it...

www.macrumors.com

Doug S · Mar 20, 2025

jdubs03 said:
Ha! That’s all I have to say.

Rumor Reversal: A20 Chip for iPhones Said to Use TSMC's 2nm Process

Earlier this week, the investment firm GF Securities shared multiple research notes regarding Apple's future chips. In one of these notes, it...

www.macrumors.com

I think that rumor is ALSO wrong.

A20 will be N3P, A20P will be N2.

jdubs03 · Mar 20, 2025

Doug S said:
I think that rumor is ALSO wrong.

A20 will be N3P, A20P will be N2.

Definitely possible. It would be a good way to differentiate the Pros vs non-Pros. Particularly since the 17s are supposed to get ProMotion.

The Hardcard · Mar 20, 2025

Wow. Is this webpage rendering incorrectly? There are no comments on the first die shots of M4 Pro and M4 Max?

Apple did the same chop as M1 and M2 and they simply disable a minimum of two cores on the Pro.

Even more interesting though is that the edge of the Max chip is again redacted on the die shot. for all the blah blah blah about not every generation not getting an Ultra, it appears the M4 Max possibly has an interconnect. Despite the very low resolution, it appears that the GPU is all in the shot before the redacted part.

It seems to add more mystery to the M3 Ultra launch if an M4 Ultra is possible to do.

mvprod123 · Mar 20, 2025

Doug S said:
I think that rumor is ALSO wrong.

A20 will be N3P, A20P will be N2.

It is quite costly to develop two IPs for different nodes separately. I think both chips will be on the same node.

johnsonwax · Mar 21, 2025

mvprod123 said:
It is quite costly to develop two IPs for different nodes separately. I think both chips will be on the same node.

I think the suggestion was that it was a fairly minor modification of the existing A19 which is already on that node, and A20Pro would be a whole new design.

okoroezenwa · Mar 21, 2025

The Hardcard said:
It seems to add more mystery to the M3 Ultra launch if an M4 Ultra is possible to do.

IIRC Mark Gurman did float the idea of the Studio having an M3 Ultra and the Pro being released with an M4 Ultra so maybe that’s what’ll happen? We haven’t seen Hidra yet and that was supposedly an M4 gen die.

Doug S · Mar 21, 2025

mvprod123 said:
It is quite costly to develop two IPs for different nodes separately. I think both chips will be on the same node.

Its also quite costly to make everything in N2 when the BOM of the non Pro phones needs to be kept down. So I think they'll split between nodes like they did with iPhone 15. That doesn't mean they will get the same cores, some of the cores from A19 might be rehashed - or maybe like with iPhone 15 they re-use A19 and there is no A20 only A20P.

Doug S · Mar 21, 2025

okoroezenwa said:
IIRC Mark Gurman did float the idea of the Studio having an M3 Ultra and the Pro being released with an M4 Ultra so maybe that’s what’ll happen? We haven’t seen Hidra yet and that was supposedly an M4 gen die.

If they end up having some sort of 'Ultra' every year it would make sense to have Studio trail Mac Pro, similar to how Macbook Air trails Macbook Pro in getting the latest Apple Silicon.

johnsonwax · Mar 21, 2025

Doug S said:
Its also quite costly to make everything in N2 when the BOM of the non Pro phones needs to be kept down. So I think they'll split between nodes like they did with iPhone 15. That doesn't mean they will get the same cores, some of the cores from A19 might be rehashed - or maybe like with iPhone 15 they re-use A19 and there is no A20 only A20P.

I doubt any of this has to do with BOM, given Apple's scale on these things. The underlying problem Apple has is that the iPhone starts shipping 200 million iPhones off a Sept launch date and if TSMC has a pipeline that can accommodate 150M * die area * yield wafers at that time, then Apple has to do plan B, which is keep something of adequate scale on the prior node, or shove some product back on the calendar.

I argued the iPad was first out of the gate on M4 because TSMC had capacity that Apple otherwise wasn't prepared to use because iPhone was some months later, and didn't want to give up that capacity to competitors because they can't get it back later. If Apple wanted to keep the process advantage they had paid a small country GDP to secure, they were going to fucking use it, and they did because M4 was ready to go before A19. From Apple's perspective, their job is to figure out the product mix that best-fits to TSMCs timetable and volume. Since iPhone cannot move from its launch date because it is the primarily driver of a number of global supply chains, Apple needs to push and shove what it can. Taking base iPhone off the TSMC menu opens up enough capacity for the entire M5 line if needed without screwing up all of the other suppliers (screens, assembly, shipping etc. that are tasked to land on that timetable)

Apple's scale here is a constraining factor in their decision making, as is their growing dependency on their own engineering as they are operating in a lot of areas with no net. If TSMC can't handle their needs, there is no backup. That goes for a ton of other things - and they all need to come together in a specific point in time. The iPhone is by far the highest volume durable good manufactured in the world. Articles are written about how astounding it is the Honda Cub has sold 100 million units in the last 70 years. That's 5 months production for iPhone. Their options for how to balance this equation are very limited.

Eug · Friday at 8:52 PM

The CPU throttling behaviour of M4 seems to be different than M2, in the MacBook Air at least.

With M4 in Luke's Cinebench multi-core test, the performance cores reach max temp fairly quickly, but the efficiency cores stay cooler, well below max temp. With M2, all the cores seem to hit max temp around the same time, but more slowly than the performance cores of M4.

M2 vs. M4:

igor_kavinski · Friday at 9:53 PM

Eug said:
With M4 in Luke's Cinebench multi-core test, the performance cores reach max temp fairly quickly, but the efficiency cores stay cooler, well below max temp. With M2, all the cores seem to hit max temp around the same time, but more slowly than the performance cores of M4.

Is that a process related difference or a cooling solution difference? With the M2, I think the cooling is better and max temp is reached slower as the cooling solution dissipates the heat better and max temp is reached once the heat becomes too much. With the M4, maybe they went with cheaper cooling solution for reduced costs and/or lower weight?

naukkis · Saturday at 2:47 AM

M4 has stronger cores so getting best performance and performance/watt happening point ain't driving all cores to max temp but instead giving more power budget to big cores and less to efficiency cores. That's just natural balancing - that driving all cores to max temp is only feasible when system cores are so weak that no balancing can't be done.

mvprod123 · 2025-03-31T07:26:50-0400

The M4 Max is so convincing that in most tasks, there is no point in using the M3 Ultra. I still don't understand why Apple didn't choose the M4 Ultra, instead using the third generation.

Nothingness · 2025-03-31T08:13:50-0400

mvprod123 said:
The M4 Max is so convincing that in most tasks, there is no point in using the M3 Ultra. I still don't understand why Apple didn't choose the M4 Ultra, instead using the third generation.

Most likely because they are skipping M4 Ultra to go directly to M5 Ultra.

EDIT: I mean these things need time to get right. So I guess they started M3 Ultra long ago and at some point decided to skip M4 Ultra.

Eug · 2025-03-31T11:22:53-0400

Nothingness said:
Most likely because they are skipping M4 Ultra to go directly to M5 Ultra.

EDIT: I mean these things need time to get right. So I guess they started M3 Ultra long ago and at some point decided to skip M4 Ultra.

FWIW, since last summer there have been references in macOS 15 to M5 series Macs, identified as Mac17,1 and Mac17,2.

Mac15,x - M3 series, including M3 Ultra Mac Studio
Mac16,x - M4 series, including M4 Max Mac Studio
Mac17,x - Presumably M5 series

However, I suspect these first Mac17,x machines will turn out to be MacBook Pros, not the Mac Pro.

While they may skip M4 Ultra, there is a good chance M5 Ultra is years away.

mvprod123 · 2025-03-31T11:38:57-0400

Eug said:
FWIW, since last summer there have been references in macOS 15 to M5 series Macs, identified as Mac17,1 and Mac17,2.

Mac15,x - M3 series, including M3 Ultra Mac Studio
Mac16,x - M4 series, including M4 Max Mac Studio
Mac17,x - Presumably M5 series

However, I suspect these first Mac17,x machines will turn out to be MacBook Pros, not the Mac Pro.

While they may skip M4 Ultra, there is a good chance M5 Ultra is years away.

I still believe the Mac Pro will be released this year based on the M5 Ultra. It would be terrible to postpone the Mac Pro upgrade for so long when the M5 MacBook Pro will be on sale at the end of the year.

Nothingness · 2025-03-31T12:38:05-0400

Eug said:
FWIW, since last summer there have been references in macOS 15 to M5 series Macs, identified as Mac17,1 and Mac17,2.

Mac15,x - M3 series, including M3 Ultra Mac Studio
Mac16,x - M4 series, including M4 Max Mac Studio
Mac17,x - Presumably M5 series

However, I suspect these first Mac17,x machines will turn out to be MacBook Pros, not the Mac Pro.

While they may skip M4 Ultra, there is a good chance M5 Ultra is years away.

Do you mean we'll likely only see M5 Ultra in the next Mac Studio (2 years from now?)?

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