Maybe to prevent fragmentation and confusing readers? You can change the topic of this thread to something like "Future ARM Discussion".It seems to be locked.
Kinda the opposite of what I was going for.Maybe to prevent fragmentation and confusing readers? You can change the topic of this thread to something like "Future ARM Discussion".
How about "index" important stuff or start of relevant discussions in this thread in the first post? That's one way, though it would be pretty cumbersome (for you but everyone else will reap the benefit ).The current title is very specific, people just kept veering off that topic, which makes it harder to find information in older posts without knowing the exact text, or going through each page 1 by 1.
Wait until you start looking for complex points (for instance the use of barriers).Trying to read the ARM developer documentation is an exercise in frustration.
That doesn't work because when you are discussing a dozen of CPUs there are multiple posts discussing other things in the middle of the discussion about one core.How about "index" important stuff or start of relevant discussions in this thread in the first post? That's one way, though it would be pretty cumbersome (for you but everyone else will reap the benefit ).
AMX did you mean?then Apple's AVX that became SME
While ARM did add some instructions like LSE2 that do help with x86 emulation, it should be noted that the lions share of better x86 -> ARM64 emulation (binary translation) performance foudn in M1+ comes from Apple's µArch itself, rather than ISA extensions.Those custom instructions have always been added to the ARM ISA down the road. First the ones that helped with x86 emulation and supported the strong x86 memory model, then Apple's AMX that became SME.
It's a combination of both uarch and instructions. The store ordering is an important uarch thing, but the brain dead flag computation of x86 requires specific instructions.While ARM did add some instructions like LSE2 that do help with x86 emulation, it should be noted that the lions share of better x86 -> ARM64 emulation (binary translation) performance foudn in M1+ comes from Apple's µArch itself, rather than ISA extensions.