Actually, when I tried testing the split on Ryzen this morning, it did not work as it does with other CPUs. It only ended up disabling the cores after the boundary that should have started an additional NUMA node. Perhaps there is some whitelisting / configuration that needs to be coded into...
Overdrive is not as 'tuned' to a particular panel on FreeSync as it is on G-Sync because the scaler/TCON alone has relatively simple logic as compared to a G-Sync module.
You mean without LFC? It's painfully noticable once you dip below the lower VRR limit of the panel. Not as much of an issue if that number is as low as 30 Hz, but some panels have bottom ends that are far higher than that.
groupsize tweaks work as expected under Win 10, but do note that any given (non NUMA-aware) application will be restricted to half of the total logical cores (one NUMA node).
Interesting. Curious why AMD would not have informed MS of this with enough lead time to get the feature added to their scheduler prior to Ryzen's release. It is possible that MS reserves such updates for major releases, as it is a very low-level fix that requires lots of QC and testing.
Just calling it like I saw it, but you're entitled to your opinion. I'd like to think that folks would put a bit more weight on someone who was a party to the actual phone calls, but logic like that doesn't work on folks with an obvious axe to grind.
With the addition of LFC to FreeSync panels that have a sufficient FPS range to support it, the playing field is mostly equal. The only real difference I've seen anymore is that most of the FreeSync panels still don't get overdrive as good as it could be (example 1 2 3), particularly when...
Despite all of the pitchforks and torches, it appeared to us to really just be a miscommunication between the group writing up the spec sheets vs. the group actually designing the architecture. I'm basing that on the type of reaction we got from Nvidia when we asked them about it. It really was...
Nothing there is an admission of wrong. You can't just turn on NUMA as it is meant to segment memory spaces, not caches / CCX modules. The scheduler can't be expected to be aware of this as the CCX segmentation does not appear to be part of the CPUID. Further, the primary point of the article...
The test used issues one-way pings. The times are not round trip. And yes I have the same question about why 'closer' cores on the ring did not have shorter times. It's possible the ring is bi/counter-directional or perhaps getting to/from the ring is what takes the majority of the time.
The 'dragged tooth and nail' you are referring to was actually multiple of days worth of us testing and retesting, calls to vendors, trying to replicate the very unique worst case scenario that was being reported all over as some devious scandal. The reason for such additional testing was that...
You must be referring to the power testing hardware we used to elaborate on the RX480 power draw issues. Not only did AMD acknowledge the information we provided, they (mostly) fixed the issue. I wasn't joking, and neither were they.
I also busted out an o-scope to show differences between...
If you suspect time-based drift of flash cells, ATTO is the exact opposite of what you need to use to track it, as ATTO lays down a brand new file to run its tests on. ATTO is actually bad for even finding most FTL issues because the file is relatively small and its entries are fresh and will...
It is far more likely that this is simply FTL expansion / fragmentation impacting the look-up time of reads. I see this sort of thing all the time in testing. It varies based on the controller speed / firmware efficiency. Back when the X25-M had a slow down issue (that impacted reads when let go...
What's funny is I've seen this very scenario in a few SSD's. Basically the drive gets interrupted due to some external event, during a write, and this *somehow* results in a page being written with a mismatched CRC/ECC. The next time you attempt a read of that cluster, the drive hangs. Drives...
X25's could never perform atomic writes at the file level like ZFS does. It has no clue about any file system goings on. The closest it could come is atomic writes at the sector level as far as updating a sector with a new one, *then* updating the associated pointer in the remap table, which...
Syzygies,
Given you had an early version of the drive, and were using it in a macbook, I suspect you were hit with the bootloader / timing issue known to effect early x25-m's when used with macbooks. This timing issue has nothing to do with how data was written, or the abstraction layer, or...
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