As AMD moved io in a separate die and cores only as chiplets how likely can they make ARM cores in place of x86 cores and use the available io dies with them, it may not be that easy as it sounds but it may opens way to explore some more emerging markets. X86 for compute heavy and ARM for small...
Im not able to believe these things , there are hidden JTAG/other ports available in most of the CPUs that are not made visible outside from its company, those are used to test the processor during validation or debugging. One single port in processor are used for different purposes, in such...
GCN is an high level module, it's broken down into smaller modules and engineers are going to work according to the documentation. Architecture expanding (modification) most probably handeled by senior team members who knows GCN well.
GCN is one of the industry leading technology, no company...
Is that means Vega architecture (I'm talking about micro-architecture not rtl code writing) is fully designed by an inexperienced team?
If so then what is the work of raja team in North America does. I thought ROP and CU counts are part of architecture designing and that's taken care by raja...
[QUOTE="Vesku, post: 38995124
Maybe the modules are created by new teams but its lead engineers have high knowledge and they are mostly from stateside.
When a SOC is designed they have a rough knowledge of transistor count, area, power. For performance too they have few tests to analyze...
I have few doubts, if amd released this card with Fiji drivers for developers, then without driver support for new features whether developers can able to optimize their code for vega architecture?
GTX 1060 power is around 120w , were as RX 480 power is around 160w . As u said when a HBM2 is swapped in place of gddr there might be 15w less, then power usage will be around 145w . then its around 20% more power to compete with its counter part.
If we apply this 20% to NV titan's AMD...
Hi all , in DDR2 and above memories there is a small amount of memory called page size, can some one explain or give me an link about what is the exact use of page size ?
sorry for my english. :\
thanks in advance. :) :)
Hi,
I'm an verification designer , currently i'm developing hbm verification ip. Having doubts in hbm specification, so can anyone help me to find a forum (a good place) to ask doubts.
Thanks in advance.
Regards
Naveen C
I had enquired on some institutions for internship courses, they have offered me an 6 months training support on Front end training and most of them are using Mentor Graphics and Xilinx tools only. They told in Front end there is Designing and verification part are available, so in that which...
I did a FFT based project "An Efficient Pipelined FeedForward FFT architecture Using Split-Radix Algorithm" in my Post Graduation, I created a MDC architecture for FFT structure, architecture was coded in verilog and used Modelsim tool to compile and verify it.
I don't know whether Companies...
Yep I almost applied to all the VLSI companies at bangalore, but most of the companies are expecting only the experienced persons or they are recruiting directly from the institutions. So I'm planning to join in a institution and also to gain the professional experience.
Hi,
I have finished my post graduate in VLSI design, and planning to do a course in VLSI , which can give me professional training experience, can anyone suggest me a course (current trend on VLSI companies). Thanks in advance :-) .
[sorry for asking in wrong place :|]
Hi,
Why they are hyping more on AMD GCN and Kaveri APU, on every AMD post i can see some one taking about AMD kaveri apu. whether the performance increase will be on cpu or on gpu :confused:
Thnx in advance :)
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