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    64 core EPYC Rome (Zen2)Architecture Overview?

    Eventually AMD wants to move to active interposers. Maybe 4th generation Zen? https://spectrum.ieee.org/tech-talk/semiconductors/design/amd-tackles-coming-chiplet-revolution-with-new-chip-network-scheme
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    In-Depth: Intel's 10nm was definitely NOT too ambitious

    If this analysis is correct, the window for III-V to outperform Si is pretty narrow. http://www.ispd.cc/slides/2016/3_1.pdf
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    Is Intels fabrication process advantage shrinking?

    I don't doubt that it's better positioned for mobile. The fact remains it's inferior to their planar processes in overclocking. There's always trade-offs. It's not some magical panacea of processes. They probably felt safe losing their overclockability given their dominant position in the market...
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    Is Intels fabrication process advantage shrinking?

    And Ivy Bridge was noted for its inferior overclockability, although that's a very niche segment.
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    Is Intels fabrication process advantage shrinking?

    Here's a good overview of where the players are placing their bets (FD SOI, FinFET, III-V): http://www.eetimes.com/document.asp?doc_id=1262887&page_number=1 I wouldn't get excited about graphene just yet.
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    Is Intels fabrication process advantage shrinking?

    All points well taken :) The person who suggested m-of-n encoding to me knew many Apple engineers, which is why I didn't dismiss it in the first place. Also, I think we can agree that while Apple may have had time budgets, there were no $ budget issues with their designs. I think we can...
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    Is Intels fabrication process advantage shrinking?

    That's what Jon Stokes thought back when Apple bought Intrinsity: http://arstechnica.com/apple/2010/04/apple-purchase-of-intrinsity-confirmed/ I've had someone suggest to me that they may be using m-of-n encoding in their logic too...
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