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  1. H

    AMD X399 ！！！！！

    New version of aida64 added preliminary support for 12 and 16 core AMD CPUs.You can find it in their version documentation.
  2. H

    [Canard PC Hardware] Intel prepares Ryzen's response behind the scenes

    Well,at ISO power Apple is thouroughly beating Intel already.Since most of the Apple profits comes from different market segment,we will probably never see comparison at high TDP. I give AMD 50/50 chance.I do believe they have an excellent base in Zen architecture.
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    [Canard PC Hardware] Intel prepares Ryzen's response behind the scenes

    I don't think you will get much sleep.
  4. H

    New Zen microarchitecture details

    This and change in avatar.I now officialy hate you.:D
  5. H

    Multiple dies acting as one on interposer

    I would consider this a major stepping stone. Thanks to S/A forum member Apollo for heads up!
  6. H

    New Zen microarchitecture details

    It is not same meaning.Something being inhomogeneous doesn't mean it's heterogeneous;as always context. Edit: Ah,yes,most appropriate word in this case is variance.
  7. H

    AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

    So when has your Zen sample arrived?
  8. H

    AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

    Spoken like a true enthusiast! Most people after all news were like instead they should be more like
  9. H

    Multiple dies acting as one on interposer

    Few more docs and links(thanks to guys from beyond3d) if someone is interested. http://research.cs.wisc.edu/multifacet/papers/hpca14_quick_release.pdf https://www.eecis.udel.edu/~lxu/resources/TOP-PIM:%20Throughput-Oriented%20Programmable%20Processing%20in%20Memory.pdf...
  10. H

    [Eurogamer] Deep Dive on the PS4 PRO GPU (Polaris + Vega features!)

    It is shame that Nvidia does not share arch details as AMD.There are guys at beyond3d who do a lot cuda programming. It would be so much fun having someone as Sebbbi explaining Nvidia arches and programming techniques,as he does for GCN.
  11. H

    [Eurogamer] Deep Dive on the PS4 PRO GPU (Polaris + Vega features!)

    It has taken me sometime to read document.Anyone interested in GCN should read it.It basically summarizes lots of Sebbbi's posts.
  12. H

    [Eurogamer] Deep Dive on the PS4 PRO GPU (Polaris + Vega features!)

    Reading sebbbi's post over the years has taught me great deal on GPUs and how they work,too.
  13. H

    [Eurogamer] Deep Dive on the PS4 PRO GPU (Polaris + Vega features!)

    Yeah,I meant Unity. Guess I have mixed him with someone else. Nevertheless he is top class programmer.
  14. H

    [Eurogamer] Deep Dive on the PS4 PRO GPU (Polaris + Vega features!)

    Sebbbi was lead console engine programmer at Ubisoft (one of their engines,don't know which one).He is now lead for Unigine next gen.He definitively knows his stuff. Also,when laymen like us can understand complex stuff he is talking about,that is straightforward sign that he really knows what...
  15. H

    New Zen microarchitecture details

    Aah,crap! I would enjoy reading Kanter's article.
  16. H

    New Zen microarchitecture details

    What does first bullet point say?
  17. H

    AMD Raven Ridge 'Zen APU' Thread

    Regarding HBM on APUs,I think you all are missing another view from different perspective:TAM.Cost of production is chump change if there is enough TAM for your product. There was an article in which was guesstimated/calculated that you need to sell at least 10 mil. chips to break even on 14/16...
  18. H

    New Zen microarchitecture details

    Any advances on this,especially last sentence?
  19. H

    Exynos M1

    That one is a ringer,isn't it? But it also has nice caches,good ratio of power to exe. resources to name the few.
  20. H

    New Zen microarchitecture details

    I missed thread priorization discussion.So they are doing it in hardware,overiding OS?What mechanism do you think they are using? Regarding stack cache,as I am aware(I read about it somewhere), it reduces power consumption by reducing AGU pressure.Now,that 3rd AGU,or lack of it to be precise,to...
  21. H

    Exynos M1

    Yeah,I think you're right.That could be it. But if you ask me,I think Bobcat/Jaguar were one of the best CPU designs AMD ever made.So if I was a CPU designer,I would try to take best from it.
  22. H

    Exynos M1

    Here is Anandtech's report from Hotchips. It reminds me a lot of Bobcat/Jaguar.
  23. H

    New Zen microarchitecture details

    Yes,I am aware of that(with little help from Tuna-fish and yours,like your blog btw.and majord's diagram)now.My confusion was also from mix up in terminology;dispatcher-sheduler.
  24. H

    New Zen microarchitecture details

    Thank you!
  25. H

    New Zen microarchitecture details

    Yes,that part is a given,but performance figures in conclusion are bit over the top.He forgets that Power is SMT4,ofcourse,firing 2nd thread gives huge boost in performance.
  26. H

    New Zen microarchitecture details

    Sheduler per pipe still baffles me.Is this their solution for handling SMT?Anyone have any idea? Edit: Or the high level diagram is confusing me?
  27. H

    [TomsHW] PCIe 4.0 - 32GB/sec over x16, 300-500W slot power

    As other posters correctly pointed I was wrong,for some reason I forgot we are talking about DC. My apologies to Shivansps.
  28. H

    [TomsHW] PCIe 4.0 - 32GB/sec over x16, 300-500W slot power

    Wrong beyond belief. Current travels on surface of conductors.That is why you have traces on boards,to increase area,so that higher current can go through.One can make flat wire(trace) 100 microns thick that can carry 1 kA and tens of kW of power if it wide enough. So please stop talking rubish.
  29. H

    [TomsHW] PCIe 4.0 - 32GB/sec over x16, 300-500W slot power

    Thanks for heads up!
  30. H

    New Zen microarchitecture details

    I'm quite suprised with shedulers.I think that Dresdenboy guesses well regarding powergating and extracting maximum ILP.Could reason also be SMT? From Hotchip slides threads are competing for resources eg. allocation is dinamic,only reteriment is static(which makes sense).Does this reduce...
  31. H

    New Zen microarchitecture details

    Kudos to Dresdenboy.
  32. H

    ARM and Intel team up for 10nm

    Thank you! 2019 will be interesting for fab comparisons!
  33. H

    ARM and Intel team up for 10nm

    Really?Got some link?I'm really interested what's that about.
  34. H

    ARM and Intel team up for 10nm

    I am not so sure about this.This could just be for their Altera part of business.
  35. H

    AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

    Well,after examining comparison done by guru3d and wccf,and AotS benchmark leaderboard,I have to say we are back to square one - we know nothing(or almost nothing) of general performance of Zen CPUs. Game bencmark is GPU bound(which should be if we are honest),CPU score in bencmark is...
  36. H

    Hostility in the GPU Space?

    Where is that short comic "Someone is wrong on the internet" when you need it.
  37. H

    Geforce GTX 1060 Thread: faster than RX 480, 120W, $249

    Good thing I wasn't drinking anything.:D
  38. H

    AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

    Oh,it will be cheaper than equivalent Intel CPU.AMD is minor player in market,that is their reality. But that's about it. Also,why are people jumping to conclusion about performance based on one preliminary result?We don't have enough information.We don't know TDP,cache size,cache speed,micro...
  39. H

    A look into APU graphics performance in modern games.

    Up to 50%.Zen APU is expected to have up to 12 CU,paired to faster RAM up to 3200 DDR4 and of course improved GCN arch.,gen4.
  40. H

    Geforce GTX 1060 Thread: faster than RX 480, 120W, $249

    I partially agree.In todays DX11 and DX12 they perform about the same,and price is about the same,so as you said - pick your poison. Now,todays DX12 games use featurelevel_11.My believe is that when games start to use featurelevel_12,RX480 will be substantially faster.Will that be enough...
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