On another Note: does anyone have a code snippet to load uCode or is familiar with the procedure? I would like to add uCode to my drivers to improve OS and Boot compatibility.
Added some more Core/Cache undervolting combos.
Dual CPU EFI should work single CPU as well.
https://peine-braun.net/public_files/XEON_V3_BIOS_MODS/EFI-Drivers/
Let me know if I screwed up.
So not the same issue as with the old v3x2 when converting into ffs and integrating into bios... that is great news to me. Thank you very much.
Dual CPU Fully integrated Bios possible now ;)
I will make more core/cache combos tomorrow.
I take it you took the v3x2_payne_50_50.ffs ....
did you try the corresponding efi beforehand?
maybe CANONKONG can try to reproduce.
Debugging is hard if you dont have the hardware on hand ;(
Alright. I am just very curious if that driver can be integrated, as the old v3x2 couldnt be and i suspect it might be the UEFI SMP Service not working the same in that stage of booting.
And why is that? I dont do that, however I had to remove asrock security stuff by hand. MSI had no security...
Differential Voffset is no problem.
But I am not sure if undervolting is neccesarily our way to higher multis as stability will be an issue.
Not Sure if your CPU0 could handle 0.94V (-110mv).
I switch BSP 2 or 3 times, depending on initial BSP number.
I accidentaly left the AP in disabled state when switching, hence I could not switch back with my first version, hence the error. And that left 1 AP in disabled state.
I have updated my v3x2 drivers and found the reason for the EFI_MP_SERVICES_PROTOCOL Error.
That be fixed now. Maybe it also fixes the boot delay?!?
Also I have added some more core/cache voltage combinations.
Drivers can be found here...
I will gladly build more versions and also look into TDP limits, SA voltage, SVID telemtry in the future.
I have to debug "Failure - EFI_MP_SERVICES_PROTOCOL Error" beforehand.
(Maybe its related to Windows starting slowly, but i think it could also be the missing uCode)
I (think I) have successfully added SMP to my v3.asm
I have uploaded it to https://peine-braun.net/public_files/XEON_V3_BIOS_MODS/EFI-Drivers/v3x2/
one is -20mV and one -50mV on both core and cache.
IT is untested YET.
Unfortunatly I have no Xeon v3 around to test it out and my friend with the...
That probably wont work... for me all V3x2 cannot be included for some reason... BIOS wont post.
Not Sure why... thats why I have been asking for the source a few times. Maybe its issues with the C compiler, or it is related to SMP functions. I am trying to find out.
I have uploaded some more...
Most certainly not. It is single CPU like v3.efi right now.
What puzzles me is why u have high multiplier on both CPU's... You have multi setup in Bios? or did you load another efi before?
I had to make quite a few changes to the original code to make it compile and did some cleanup. (lots of unneccesary push/pop, lots of n00b-unfriendly formatting etc., I think it is now more readable.. at least to me (first time asm x86_64), assembler pro's might disagree)
Also i am probably...
https://peine-braun.net/public_files/v3_payne_70_50.efi
You are welcome.
Any other voltages are a matter of seconds to compile.
Now I am working on multi-cpu support. V3x2 source would really help.
I have the same issue here.
I am quite sure i can manage that.
I will set up fasm sometime this week and try myself out. Bad thing is that i am only doing this remotely on a friends machine so debugging suxx.
@Welsper @randir
I would love if you would reupload your sources, so i can try to...
@Welsper :
@randir :
I would be highly interested in your sources as a starting point, however the link posted earlier is not working anymore.
I would gladly participate in your development and github project.
I own a 2696v3 R2 and Asrock X99E ITX... so far I got 3.2 Ghz allcore, however only...
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