It's not the CMT what made Bulldozer a inefficient, but the rest of the architecture. I expect AMD to reimplement it in Zen2 or Zen3 together with SMT for a quad thread module or core...
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I don't believe that there would be any changes in the core microarchitecutre. But I belive that its pipeline logic will be fine tunned for higher clocks. I expect it to get improved macro-architecture with a much faster IF, PCI-e 4.0 and the precision boost 2 which is present in the Raven Ridge...
The usage of TIM will not reduce the power usage, but will reduce the cores temperature. As for the performance/watt, CoffeLake CPUs already have 15~20% better performance/watt than Ryzen (8600K vs 1600X, 8700K vs 1800X). And I believe that Intel will introduce new Turbo-Boost with a smarter and...
Intel have many reasons not to let AMD to overtake a CPU crown in any segment. They already have learned the lesson 15 years ago with Athlon/Athlon64 and Opteron.
Such 8 core desktop CPU like the i7 9700K would be a double-edge sword for Intel. It will compete with Ryzen 7 and ThreadRipper with...
Nice finding! Now we can safely address the problem, it is the Infinity Fabric which adds latency to all the traffic going through it! To reduce the latency AMD need a serious bump in IF clock or it has to completely redesign the IF, which IMHO is impossible with the 12nm Zen+ refresh.
It doesn't matter who is right and who is wrong, we are humans so we can learn and there is nothing wrong with it. So, lets clear up the things. Back in the days FSB or Front Side Bus was used as a term for a system bus connecting the CPU to all the system's I/O, while the BSB or Back Side Bus...
This is apples to watermelons comparison. The number of stages is absolutely irrelevant when comparing frequencies of completely different architectures on the same lithography node. Its like comparing two people, one eating 3 apples and the other 2 watermelons. So, who ate more fruits?
Let's not confuse TDP with power cosnumption/heat dissipation. These are completely different things, let alone the differences of how TDP is determined on different CPUs using different architecture or lithography node.
The miracle behind Ryzen 2000 APUs is that they share the same power...
AMD used the FSB starting from their first x86 CPU, the K5, until K8. From K8 to ZEN the AMD CPUs were using HTT as a direct point-to-point connection to the chipset and to other CPUs, while the Northbridge including the Memory Controller was moved to the CPU, where the IMC was directly...
Q6600 V2 is a Q6600 Rev G0 which OC much better than the Q6600 B3. The Q6600(Kentsfield) is 2.4GHz(9x266) with 2x4MB L2 FSB1066 65nm, while the Q8400(Yorkfield) 2.66GHz(8x333) 2x2MB L2 FSB1333 45nm is a derivate with only 1/3 of the available L2 enabled. The Q6600 is a much better option for OC...
Well the "new" i3 are so "old" i5...and z370 mainboards are so expensive. If I was you for the same budget I was going to look at a B350 mainboard and a Ryzen 7 1600 for the same money. With or without OC it should wipe the floor with the i3 8100 in almost all the apps known to mankind.
If I was you, I was going to use that Q8400 as a key-chain. :D
Anyway, If you have enough free time, some money to waste and you want to play with antiques then its OK whatever you do. But if you are asking from consumer perspective what to do then there is no point in wasting a cent for such an...
Errata is addressing bugs and in very rare cases the workarounds for those bugs have real-life impact on performance (like the TLB bug in the first Phenom Rev B2). If AMD decided to improve the Data Fabric in Zen+ (by doubling its bandwidth and reducing its latency) I expect modest IPC...
SKL-X has power and heat problems. I expect a 16 core Ryzen+ ThreadRipper @4.2GHz on all cores and 4.4GHz on four cores boost with (the updated) IF2 with quad DDR4-3200 at least to match the performance of (the same clocked) 7960X in average while consuming less energy.
As for the...
I was quite busy for the weekend, so excuse my late reply to your post.
First, lets clarify what DataFabric is and how it works. It is a is a multiple coherent point-to-multi point HyperTransport links connecting all the I/O, DRAM and CCX L3 caches in the system. According to the current, HTX...
Guys, regardless of the "GPU Bottleneck" at any resolution, in some games CFL performs much(~10%) better, while in other Ryzen. So, there is still a lot of room for improvements on both architectures before the GPU becomes the only bottleneck. Ryzen performs quite good up to a certain framerate...
Guys, If somebody is new on the forum that doesn't mean he is new in life and noob in computers and hardware. Some "teachers" here are asking me off-topic questions about my knowledge and are making assumptions about me. I opened the thread to talk about Ryzen+, not about me. If you really are...
Everything is a comrpomise.
A 2:3 IF:DRAM divider will solve this. I don't think that the IF can't clock higher. IMHO the reason behind the conservative IF clocks is the power efficiency which was one of the key importances when Zen was designed. Doubling its speed will most probably quadruple...
I don't know who The Stilt is, but I share your thoughts about the reasons why IF is clocked so low. The energy efficiency is one reason, and the stability/errata, especially on the MCM and multi socket-MCM designs, is the other.
Also there are other reasons why I expect IF2 to be the key...
I don't see a reason why to use huge amount of HBM for CPU tasks, especially for today's modern CPUs which have excellent predictors and prefetchers. 1GB HBM2/HBM3 acting as Level 4 victim cache(just like the eDRAM is acting on Broadwell-E) will be more than enough to hold all the required data...
If you analyse this slide, like Anand did, you will find out that Ryzen was designed from the begining to run high DRAM clocks. Actually TR was planned to be released with a native 3200MHz support, but for other (chipset/mainboard/etc) reasons it was released with a slower native DDR4-2666...
I have no other info than what is already available on the internet.
These numbers and features are not just pulled out of my a$$, but are precisely picked and polished having connection with reality and what's possible. :)
Hi folks,
I talked to my crystal ball and here is what it said about AMD and what can we expect from them in order to remain competitive and even surpass Intel in both performance and power efficiency in certain CPU segments. Jokes aside, these are just my expectations and visions and are based...
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